On the Security of Sequential Logic Locking Against Oracle-Guided Attacks

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 42; no. 11; p. 1
• Main Authors: Hu, Yinghua, Zhang, Yuke, Yang, Kaixin, Chen, Dake, Beerel, Peter A., Nuzzo, Pierluigi
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.11.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuits; Clocks; Cryptography; Electronics packaging; Hardware Security; Integrated circuit modeling; Keys; Locking; Logic; Logic Locking; Model checking; SAT-Based Attack; Sequential circuits; Time factors
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2023.3253428

The Boolean satisfiability (SAT) attack is an oracle-guided attack that can break most combinational logic locking schemes by efficiently pruning out all the wrong keys from the search space. Extending such an attack to sequential logic locking requires multiple time-consuming rounds of SAT solving, performed using an "unrolled" version of the sequential circuit, and model checking, used to determine the successful termination of the attack. This paper addresses these challenges by formally characterizing the relation between the minimum unrolling depth required to prune out the wrong keys of a SAT-based attack and a notion of functional corruptibility (FC) for sequential circuits, which can be efficiently estimated from a locked circuit to indicate the progress of a SAT-based attack. Based on this analysis, we present an FC-guided SAT-based attack that can significantly reduce unnecessary SAT and model checking tasks. We present two versions of the attack, namely, Fun-SAT and Fun-SAT+, based on whether the attacker has a priori knowledge of the key length. Fun-SAT aims to find the correct key sequence, while Fun-SAT+ aims to retrieve the correct initial state of the circuit. Numerical evaluation shows that Fun-SAT can be, on average, 90× faster than previous attacks against state-of-the-art locking methods. On the other hand, when using an approximate termination condition, Fun-SAT+ can find an initial state that leads to at most 0.1% FC in 76.9% instances that would otherwise time out after one day.