Reduced-Pin-Count BOST for Test-Cost Reduction

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 41; no. 3; pp. 750 - 761
• Main Authors: Lee, Youngkwang, Lee, Young-Woo, Seo, Sungyoul, Kang, Sungho
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.03.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Automatic test equipment; Automatic test equipment (ATE); Built-in self-test; built-off self-test (BOST); Circuit faults; Clocks; Cost reduction; Dynamic random access memory; High speed; Maintenance engineering; Pins; Random access memory; reduced-pin-count testing (RPCT); Repair; Self tests; Signal integrity; Test equipment
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2021.3065912

Built-off self-test (BOST) is a widely used technique to reduce the test cost. It makes it possible to test high-speed dynamic random-access memory (DRAM) without using a costly high-performance automatic test equipment (ATE). However, the currently used BOSTs require many ATE connection pins, which degrade the cost reduction effect. In this article, we propose a novel reduced-pin-count BOST to reduce the test cost. The proposed BOST uses bidirectional pins to employ the pins as efficiently as possible. Thus, even if the same amount of data is transferred, fewer pins are required than the previous BOSTs. In addition, it reduces the amount of output data by sending only the information necessary for a DRAM repair process. This is possible because the DRAM repair process requires only the location information of some faulty cells. Therefore, the proposed BOST can send output data with fewer pins compared with the previous BOSTs. Experimental results indicate that the proposed BOST can test high-speed DRAMs using a few ATE connection pins.