A 2.6-GHz Partial-Envelope Delta-Sigma-Digitized Carrier-Bursting Transmitter
This letter presents the implementation and measurement results of a partially digitized envelope-based carrier-bursting transmitter operating at 2.6 GHz. The transmitter consists of two chips, in this case: a partial-envelope delta-sigma modulator (PEDSM) and an up-conversion mixer with 130-nm CMOS...
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Published in | IEEE microwave and wireless components letters Vol. 30; no. 7; pp. 697 - 700 |
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Main Authors | , , , , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.07.2020
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Subjects | |
Online Access | Get full text |
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Summary: | This letter presents the implementation and measurement results of a partially digitized envelope-based carrier-bursting transmitter operating at 2.6 GHz. The transmitter consists of two chips, in this case: a partial-envelope delta-sigma modulator (PEDSM) and an up-conversion mixer with 130-nm CMOS technology. A second-order continuous-time delta-sigma modulator with a 622-MHz sampling clock is designed as an envelope digitizer in the PEDSM. With a long-term evolution signal with a peak-to-average power ratio of 8.7 dB, the fabricated transmitter showed a coding efficiency of 90.4% and an error vector magnitude (EVM) of 3.44% for a PEDSM threshold level of 1/3. |
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ISSN: | 1531-1309 1558-1764 |
DOI: | 10.1109/LMWC.2020.2998483 |