A Linearity-Enhanced 18.7-36.5-GHz LNA With 1.5-2.1-dB NF for Radar Applications

• Published in: IEEE microwave and wireless components letters Vol. 32; no. 8; pp. 972 - 975
• Main Authors: Wang, Zuojun, Hou, Debin, Li, Zekun, Zhou, Peigen, Chen, Zhe, Chen, Jixin, Hong, Wei
• Format: Journal Article
• Language: English
• Published: IEEE 01.08.2022
• Subjects: Gain; Gallium arsenide; Gallium arsenide (GaAs); IP networks; Linearity; low-noise amplifier (LNA); monolithic microwave integrated circuit (MMIC); noise figure (NF); Noise measurement; Semiconductor device measurement; Transistors; wideband
• ISSN: 1531-1309; 1558-1764
• DOI: 10.1109/LMWC.2022.3165124

This letter presents a <inline-formula> <tex-math notation="LaTeX">{K} </tex-math></inline-formula>-/ Ka -band gallium arsenide (GaAs) low-noise amplifier (LNA) for high dynamic range (DR) radar systems. The proposed LNA adopts a two-stage topology to acquire a compact chip size and low power consumption. A feedback circuit is employed in the second stage to achieve a wideband gain response. A diode-based adaptive bias circuit is designed to simultaneously improve the linearity and maintain a low drain current. In the 3-dB bandwidth from 18.7 to 36.5 GHz, the LNA achieves a maximum small-signal gain of 15.9 dB and a minimum noise figure (NF) of 1.5 dB. The measured input 1-dB compression point (IP 1dB ) is higher than −1 dBm, and the measured input-referred intercept point (IIP 3 ) is higher than 3.2 dBm in the operation band. The LNA has a chip size of 1.2 mm <inline-formula> <tex-math notation="LaTeX">\times0.8 </tex-math></inline-formula> mm and the power consumption is 66 mW.