A 18-44 GHz Low Noise Amplifier With Input Matching and Bandwidth Extension Techniques

This letter presents a low noise amplifier (LNA) with a 3-dB gain bandwidth (3-dB BW) of 18-44 GHz in 65-nm CMOS technology. By deriving an analytical equation of input impedance, a co-design methodology for the first two stages of LNA that can simultaneously achieve broadband input matching and low...

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Bibliographic Details
Published inIEEE microwave and wireless components letters Vol. 32; no. 9; pp. 1083 - 1086
Main Authors Wang, Ruitao, Li, Chenguang, Zhang, Jian, Yin, Sen, Zhu, Wei, Wang, Yan
Format Journal Article
LanguageEnglish
Published IEEE 01.09.2022
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Summary:This letter presents a low noise amplifier (LNA) with a 3-dB gain bandwidth (3-dB BW) of 18-44 GHz in 65-nm CMOS technology. By deriving an analytical equation of input impedance, a co-design methodology for the first two stages of LNA that can simultaneously achieve broadband input matching and low noise figure (NF) is implemented. Weakly coupled asymmetric transformers that introduce a section of reverse parallel winding in the primary coil are designed to realize broadband interstage matching, optimize the gain flatness and boost the transconductance. The proposed LNA achieves a measured peak gain of 19.5 dB with a fractional 3-dB gain bandwidth (FBW) of 83.8%, covering the whole <inline-formula> <tex-math notation="LaTeX">K </tex-math></inline-formula>-band and <inline-formula> <tex-math notation="LaTeX">Ka </tex-math></inline-formula>-band. The measured NF is 2.6-3.5 dB from 20 to 43 GHz. To the best of our knowledge, the proposed LNA achieves the highest 3-dB BW and FBW with competitive NF. The measured input 1-dB gain compression point (<inline-formula> <tex-math notation="LaTeX">\text {IP}_{\mathrm {1\,dB}} </tex-math></inline-formula>) ranges from −23 to −18.5 dBm over the entire 3-dB gain bandwidth.
ISSN:1531-1309
1558-1764
DOI:10.1109/LMWC.2022.3163462