A Reconfigurable 3-D-Stacked SPAD Imager With In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging

• Published in: IEEE journal of solid-state circuits Vol. 54; no. 11; pp. 2947 - 2956
• Main Authors: Hutchings, Sam W., Johnston, Nick, Gyongy, Istvan, Al Abbas, Tarek, Dutton, Neale A. W., Tyler, Max, Chan, Susan, Leach, Jonathan, Henderson, Robert K.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.11.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 3-D imaging; Avalanche diodes; Clocks; CMOS; Converters; Correlators; direct time of flight (dToF); High speed; histogramming; image sensor; Imaging; Lidar; light detection and ranging (LIDAR); Modular units; Photon avalanches; Photonics; Pixels; single-photon avalanche diodes (SPADs); Spatial resolution; TDC sharing architecture; time of flight (ToF); time-to-digital converter (TDC)
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2019.2939083

A 256 × 256 single-photon avalanche diode (SPAD) sensor integrated into a 3-D-stacked 90-nm 1P4M/40-nm 1P8M process is reported for flash light detection and ranging (LIDAR) or high-speed direct time-of-flight (ToF) 3-D imaging. The sensor bottom tier is composed of a 64 × 64 matrix of 36.72-μm pitch modular photon processing units which operate from shared 4 × 4 SPADs at 9.18-μm pitch and 51% fill-factor. A 16 × 14 bit counter array integrates photon counts or events to compress data to 31.4 Mb/s at 30-frame/s readout over 8 I/O operating at 100 MHz. The pixel-parallel multi-event time-to-digital converter (TDC) approach employs a programmable internal or external clock for 0.56-560-ns time bin resolution. In conjunction with a per-pixel correlator, the power is reduced to less than 100 mW in practical daylight ranging scenarios. Examples of ranging and high-speed 3-D ToF applications are given.