NLDMOS ESD Scaling Under Human Metal Model for 40-V Mixed-Signal Applications

• Published in: IEEE electron device letters Vol. 33; no. 11; pp. 1595 - 1597
• Main Authors: Malobabic, S., Salcedo, J. A., Hajjar, Jean-Jacques, Liou, J. J.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.11.2012; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Compound structure devices; Design. Technologies. Operation analysis. Testing; Electronics; Electrostatic discharge (ESD); Electrostatic discharges; Exact sciences and technology; human metal model (HMM); IEC standards; Integrated circuits; laterally diffused MOS (LDMOS); Logic gates; MOS devices; Robustness; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Stress; MOS technology; Circuit design; Lateral diffusion; Electrostatic discharge; Mixed signal circuit; MOS structure; laterally diffused MOS (LDMOS); human metal model (HMM); Complementary MOS technology; Hidden Markov models; Integrated circuit; Electrostatic discharge (ESD); Bipolar technology; Robustness; NMOS technology; Double diffusion
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2012.2213574

Electrostatic discharge (ESD) robustness of LDMOS (laterally diffused MOS) devices is found to be highly dependent on the type of ESD stress. In particular, the device's ESD robustness does not scale with the device width, and this condition is substantially aggravated during the International Electrotechnical Commission (IEC) 61000-4-2 stress condition. IEC 61000-4-2 is a system-level ESD standard increasingly being adopted in the industry for ESD robustness assessment at the integrated circuit level. A comprehensive evaluation under the IEC 61000-4-2 stress impacting precision circuit designs is introduced in this letter for variable width LDMOS devices fabricated in a 0.18-μm bipolar-CMOS-DMOS process for 40-V mixed-signal applications.