Air-Gap Through-Silicon Vias
This letter reports for the first time the fabrication and characterization of through-silicon vias (TSVs) using air-gap insulators to enable high-performance 3-D integration. To address the challenge in fabricating extremely high-aspect-ratio air gaps, a CMOS-compatible sacrificial technology based...
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Published in | IEEE electron device letters Vol. 34; no. 3; pp. 441 - 443 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.03.2013
Institute of Electrical and Electronics Engineers |
Subjects | |
Online Access | Get full text |
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Summary: | This letter reports for the first time the fabrication and characterization of through-silicon vias (TSVs) using air-gap insulators to enable high-performance 3-D integration. To address the challenge in fabricating extremely high-aspect-ratio air gaps, a CMOS-compatible sacrificial technology based on pyrolysis of poly (propylene carbonate) has been developed, upon which air-gap TSVs have been successfully achieved. The measured capacitance density and leakage current density of air-gap TSVs are 1.22 nF/cm 2 and 10 nA/cm 2 , respectively, about one order and two orders lower in magnitude than TSVs using SiO 2 insulators. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2013.2239601 |