A Fast-Transient Low-Dropout Regulator With Current-Efficient Super Transconductance Cell and Dynamic Reference Control

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 68; no. 6; pp. 2354 - 2367
• Main Authors: Ming, Xin, Kuang, Jian-Jun, Liang, Hua, Zhang, Jie, Qin, Yao, Zhang, Zhi-Wen, Wang, Zhuo, Zhang, Bo
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuits; Circuits and systems; CMOS; Control stability; Control theory; Current amplifiers; Current efficiency; dynamic biasing; dynamic reference control; Dynamic stability; Electric potential; Feedback loop; Feedback loops; High bandwidth; low-dropout regulator; Regulation; Regulators; Response time; Robust control; Slew rate; Spikes; super transconductance; System-on-chip; Time factors; Transconductance; Transient analysis; Transient response; Voltage; Voltage control
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2021.3063480

A fast-transient, current-efficient low-dropout regulator (LDO) with super transconductance cell (STC) is proposed in this paper. By adopting advanced current amplifier (CA) and dynamic biasing (DB) techniques for the error amplifier (EA), the feedback loop bandwidth can be significantly extended without increasing much quiescent power, which reduces output voltage spikes and response time greatly. Moreover, dynamic reference control (DRC) with robust loop stability is embedded in the LDO to adaptively adjust voltage reference during transient so as to further enhance the slew rate of EA, realizing significant enhancement for the transient performances. This circuit has been implemented in a <inline-formula> <tex-math notation="LaTeX">0.35\mu \text{m} </tex-math></inline-formula> CMOS process and occupies an active chip area of <inline-formula> <tex-math notation="LaTeX">456\times 278 \mu \text{m}^{\mathbf {2}} </tex-math></inline-formula>. Experimental results show that it is able to provide 100mA load current at 200mV dropout voltage, with current efficiency of 99.88%. The output voltage spike under maximum load current change in 20ns edge time is less than 11.2mV with a <inline-formula> <tex-math notation="LaTeX">0.054\mu \text{s} </tex-math></inline-formula> response time. The power-supply rejection (PSR) at 100kHz is −75.6dB.