Modified Cascaded Boundary-Deadbeat Control for a Virtually-Grounded Three-Phase Grid-Connected Inverter With LCL Filter

Cascaded boundary-deadbeat controller has been proven to be effective in controlling single-phase grid-connected inverter with LCL output filter. Such architecture mitigates filter resonance and offers good stability under stiff- and weak-grid conditions. However, its merits are offset by requiring...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on power electronics Vol. 32; no. 10; pp. 8163 - 8180
Main Authors Yuanbin He, Chung, Henry Shu-Hung, Ho, Carl Ngai-Man, Weimin Wu
Format Journal Article
LanguageEnglish
Published New York IEEE 01.10.2017
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Cascaded boundary-deadbeat controller has been proven to be effective in controlling single-phase grid-connected inverter with LCL output filter. Such architecture mitigates filter resonance and offers good stability under stiff- and weak-grid conditions. However, its merits are offset by requiring many sensors, dedicated control loop to regulate the operating frequency, and high-precision intracycle information of the circuit variables to dictate the states of the switches. A modified cascaded boundary-deadbeat control law with reduced number of current sensors, the use of current band to regulate the operating frequency, and intracycle information recovery mechanism of the filter capacitor voltage for a virtually-grounded three-phase grid-connected inverter with LCL filter is presented. It inherits the merits of allowing the inverter to exhibit fast dynamic response and mitigating filter resonance. The contaminated intracycle information of the filter capacitor voltage is recovered so as to estimate and predict state trajectories accurately. Furthermore, a dc bus voltage feedforward injection scheme with reduced number of voltage sensor is proposed. It utilizes the duty cycle information of the gate signals to compensate the effect of the unbalanced dc bus capacitor voltages on causing modulation saturation and current distortion. The system characteristics under parametric variations will be studied. A 3-kW prototype has been built and evaluated under stiff- and weak-grid conditions.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2016.2637078