Low-Area TCAM Using A Don't Care Reduction Scheme

• Published in: IEEE journal of solid-state circuits Vol. 53; no. 8; pp. 2427 - 2433
• Main Authors: Woo, Ki-Chan, Yang, Byung-Do
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2018; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Associative memory; CMOS; Computer architecture; Data storage; Decoders; Decoding; Don’t care; Internet Protocol (IP) address; IP (Internet Protocol); IP networks; low area; memory reduction; Metals; Microprocessors; Random access memory; Reduction; Relocation; Semiconductor devices; ternary content-addressable memory (TCAM); Transistors
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2018.2822696

This paper proposes a low-area ternary content-addressable memory using a don't care reduction (DCR) scheme. In Internet Protocol (IP) address, the prefix bits store "0" or "1," and the remaining bits store "X" (don't care). The conventional ternary content-addressable memory (TCAM) needs a 2N-bit memory for an N-bit IP address, because its TCAM cell uses 2-bit memory to store a data bit ("0" or "1") and a don't care ("X") bit. However, the proposed DCR TCAM (DCR-TCAM) needs a (<inline-formula> <tex-math notation="LaTeX">N + \log _{2}N </tex-math></inline-formula>)-bit memory for an N-bit IP address. It also stores N-bit data, but it encodes N-bit "X"s into a <inline-formula> <tex-math notation="LaTeX">\log_{2}N </tex-math></inline-formula>-bit code, storing the first "X" position. The proposed DCR-TCAM performs the function of "X" in the TCAM from the <inline-formula> <tex-math notation="LaTeX">\log_{2}N </tex-math></inline-formula>-bit code by using additional decoders and bypass transistors. A <inline-formula> <tex-math notation="LaTeX">256 \times 128 </tex-math></inline-formula>-bit DCR-TCAM chip was fabricated using a 1.2-V, 65-nm CMOS process. Its area is 0.22 mm 2 , which is only 72% of the conventional TCAM. It expands an effective memory size by applying the data-relocation TCAM scheme. Its energy/bit/search is 0.41 fJ at a clock frequency of 330 MHz.