A Multi-Step Incremental Analog-to-Digital Converter With a Single Opamp and Two- Capacitor SAR Extended Counting

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 68; no. 7; pp. 2890 - 2899
• Main Authors: Kuo, Shih-Che, Huang, Jia-Sheng, Huang, Yu-Cheng, Kao, Chia-Wei, Hsu, Che-Wei, Chen, Chia-Hung
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.07.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog to digital conversion; Analog to digital converters; analog-to-digital converter (ADC); binary search; Capacitors; Clocks; CMOS; Data conversion; Delta sigma (ΔΣ) modulator; Digital to analog converters; extended counting; FIR DAC; Gain; Hardware; Impulse response; incremental data converters; infinite impulse response; measurement and instrumentation; Modulation; multi-stage noise shaping (MASH); multi-step; multi-step incremental ADC; Quantization (signal); sensor interface; successive approximation register (SAR); time-domain analysis; Timing; two step; two-capacitor
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2021.3077735

This work describes a hybrid incremental ADC (IADC) with two-capacitor (2-C) successive-approximation registers (SAR) extended counting in two-step operation to achieve high resolution data conversion. The circuits in the first step is acting as a first-order incremental analog-to-digital converter (IADC). Finite impulse response (FIR) DAC is incorporated in the loop filter to reduce the transient voltage step. It is reconfigured as a 2-C SAR to perform extended counting technique in the second step. Only one opamp is re-used in both steps. The hardware is prototyped in <inline-formula> <tex-math notation="LaTeX">0.18~\mu \text{m} </tex-math></inline-formula> CMOS technology, and the hybrid ADC accomplishes a measured DR / SNR / SNDR of 100.2 / 97.1 / 96.6 dB and an input signal bandwidth of 1.2 kHz. Operated at 1.5-V, it consumes <inline-formula> <tex-math notation="LaTeX">33.2~\mu \text{W} </tex-math></inline-formula>, and this achieves a Walden figure-of-merit (FoM) of 0.25 pJ/conversion-step and Schreier FoM of 175.8 dB.