A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks

• Published in: IEEE journal of solid-state circuits Vol. 56; no. 9; pp. 2656 - 2667
• Main Authors: Kim, Keun-Mok, Seok, Hyun-Gi, Jung, Oh-Yong, Choi, Kyung-Sik, Yun, Byeonghun, Kim, Subin, Oh, Wonkab, Jeong, Eui-Rim, Ko, Jinho, Lee, Sang-Gug
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.09.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog to digital conversion; Analog to digital converters; Bandpass filters; Binary frequency-shift keying (BFSK); Bit error rate; Channels; CMOS; Demodulators; Digital signal processing; Fading channels; Gain; Internet-of-Things (IoT); Keying; low-power wide-area network (LPWAN); massive machine-type communications (mMTC); Microcontrollers; Modems; Network latency; receiver (RX); Receivers; Reconfiguration; Sensitivity; Simulation; ultra-low-power (ULP); wake-up receiver (WuRX); Wide area networks
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2021.3063134

A 900-MHz high-sensitivity split-channel binary frequency-shift keying (SC-BFSK) reconfigurable data/wake-up receiver (RX) for low-power wide-area networks (LPWANs) is presented. In the data mode, the proposed RX demodulates data through the RF/analog front end (RXFE), the analog-to-digital converter (ADC), and the modulator-demodulator (MODEM). The MODEM implemented in the external microcontroller unit (MCU) applies additional digital signal processing to improve about 17-dB sensitivity. In the wake-up mode, the proposed RX saves the power dissipation by turning off all blocks except for the RXFE and wake-up preamble detector (WuPD). The WuPD following the RXFE provides a 17-dB sensitivity improvement in place of the MODEM of the data RX. Adopting the proposed SC-BFSK, in which other channels are inter-allocated between the BFSK tones of one channel, increases the number of channels while taking advantage of wide tone spacing, which improves the bit error rate (BER) in a multipath fading channel. To implement the ultra-low-power (ULP) SC-BFSK RX, the RXFE employs the 2:1 LO sliding-IF architecture and a band-pass filter (BPF)-based frequency-to-energy detection baseband demodulator. Implemented in 55-nm CMOS, the proposed RX, including both data and wake-up RXs, exhibits −123-dBm sensitivity with 0.39-kbps data rate and 81.92-ms wake-up latency, while the RX chip dissipates 0.88 mW.