Detecting Hardware Trojans Using Combined Self-Testing and Imaging

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 41; no. 6; pp. 1730 - 1743
• Main Authors: Vashistha, Nidish, Lu, Hangwei, Shi, Qihang, Woodard, Damon L., Asadizanjani, Navid, Tehranipoor, Mark M.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuit design; Circuit reliability; Electronic systems; Foundries; Hardware; Hardware Trojans; Image processing; image processing and machine learning; Inspection; Integrated circuits; Layout; logic testing; Machine learning; Malware; Performance evaluation; Self testing; SEM microscopy; System-on-chip; Trojan horses
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2021.3098740

Hardware Trojans are malicious modifications in integrated circuits (ICs) with an intent to breach security and compromise the reliability of an electronic system. This article proposes a framework using self-testing, advanced imaging, and image processing with machine learning to detect hardware Trojans inserted by untrusted foundries. It includes on-chip test structures with negligible power, delay, and silicon area overheads. The core step of the framework is on-chip golden circuit design, which can provide authentic samples for image-based Trojan detection through self-testing. This core step enables a golden-chip-free Trojan detection that does not rely on an existing image data set from Trojan-free chip or image synthesizing. We have conducted an in-depth analysis of detection steps and discussed possible attacks with countermeasures to strengthen this framework. The performance evaluation on a 28-nm FPGA and a 90-nm IC validates its high accuracy and reliability for practical applications.