Endurance-Aware Allocation of Data Variables on NVM-Based Scratchpad Memory in Real-Time Embedded Systems

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 34; no. 10; pp. 1600 - 1612
• Main Authors: Wang, Zhu, Gu, Zonghua, Yao, Min, Shao, Zili
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.10.2015; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Embedded systems; Heuristic algorithms; non-volatile memory; Nonvolatile memory; Optimization; Random access memory; real-time embedded; Resource management; Runtime; Scratchpad memory; scratchpad memory (SPM); real-time embedded; Nonvolatile memory (NVM)
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2015.2422846

Nonvolatile memory (NVM) has many benefits compared to the traditional static RAM, such as improved reliability and reduced power consumption, but it has long write latency and limited write endurance. Scratchpad memory (SPM) is software-managed small on-chip memory for improving system performance and predicability. We consider SPM based on spin-transfer torque RAM, a type of NVM with high performance and good endurance. We present algorithms for allocating data variables to SPM and distribute write activity evenly in the SPM address space, in order to achieve wear-leveling and prolong the lifetime of NVM. We present two optimization algorithms for minimizing system CPU utilization subject to NVM lifetime constraints: 1) an optimal algorithm based on ILP and 2) an efficient heuristic algorithm that can obtain close-to-optimal solutions.