Power aware floorplanning in multiple supply voltage domain

• Published in: International journal of circuit theory and applications Vol. 50; no. 2; pp. 382 - 393
• Main Authors: Banerjee, Suchandra, Roy, Suchismita
• Format: Journal Article
• Language: English
• Published: Bognor Regis Wiley Subscription Services, Inc 01.02.2022
• Subjects: Boolean algebra; Electric potential; Electronic devices; fixed outline floorplanning; Floorplans; Maximum power; multiple supply voltage; Optimization; Power consumption; Power management; power network resource; Voltage drop
• ISSN: 0098-9886; 1097-007X
• DOI: 10.1002/cta.3156

Summary Floorplanning in this nano‐scale era involves consideration of various other objectives apart from minimizing wirelength in a fixed outlined region. In recent era of electronic devices, reducing power consumption is an important objective which can be achieved by multiple supply voltage island aware floorplanning. Optimizing power routing resource to simplify power planning while reducing voltage drop or IR drop (represented by maximum power length) is the major goal of the proposed work. Moreover, it has been observed that locations of blocks and power pads are important considerations for IR drop optimization. The proposed work hence concentrates on generating efficient floorplan with respect to wirelength, power routing resource, and IR drop. The proposed technique uses effective heuristics along with a SAT (Boolean satisfiability)‐based framework to generate efficient floorplan considering all factors. The experimental validation depicts good results with respect to power resource, wirelength, and voltage drop in a fixed outline framework. The proposed work devises an efficient way to cluster blocks in the same power domain using pseudo nets. The placement of blocks within clusters are determined by a SAT‐based framework to minimize the power network resource and wirelength of blocks in a fixed outline framework. The proposed work is extended to voltage drop (IR) aware floorplanning where the assignment of the block is heuristic driven instead of random switching activity estimation.