Metal Boundary Effect Mitigation by HKMG Thermal Process Optimization in FinFET Integration Technology

• Published in: IEEE transactions on electron devices Vol. 71; no. 4; pp. 2335 - 2341
• Main Authors: Li, Zhao-Yang, Wang, Xue-Jiao, Jiang, Yu-Long
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amorphous silicon; Annealing; FinFET; FinFETs; Hafnium oxide; high-k/metal gate (HKMG); Logic gates; metal boundary effect (MBE); Molecular beam epitaxial growth; MOSFET; thermal annealing; Threshold voltage; Tin

In this work, the influence of high-<inline-formula> <tex-math notation="LaTeX">{k} </tex-math></inline-formula>/metal gate (HKMG) thermal processes such as post dielectric annealing (PDA), post metal annealing (PMA), and post amorphous Si cap annealing (PCA) on met...