High-Speed Phase Structured Light Integrated Architecture on FPGA

• Published in: IEEE transactions on industrial electronics (1982) Vol. 71; no. 1; pp. 1 - 12
• Main Authors: Chen, Zhong, Hu, Tianlong, Hao, Yuya, Zhang, Xianmin
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 3D reconstruction; Algorithms; Computer architecture; Field programmable gate arrays; FPGA; High speed; Image reconstruction; Phase measurement; phase-shifting fringe projection profilometry; Pipelining (computers); Power consumption; Real-time systems; Shape measurement; structured light; Three-dimensional displays; Time measurement
• ISSN: 0278-0046; 1557-9948
• DOI: 10.1109/TIE.2023.3250771

Phase-shifting fringe projection profilometry (FPP) in three-dimension (3D) structured light measurement is widely applied in high-accuracy 3D shape measurement scenarios. But motion objects or other dynamic scenarios make the traditional phase-shifting FPP hard to deal with due to its sizable CPU-based execution time. Therefore, an embedded high-speed and high-accuracy phase-shifting FPP system is designed and implemented on FPGAs. The system implements a three-frequency four-step phase-shifting hardware algorithm with RTL-level caching, multi-frame image ping-pong buffering, and data handling, etc. The system exhibits fully-parallel and pipeline processing while behaving with lower resource and power consumption. Measurement experiments indicate that the proposed method can reach high-accuracy real-time 3D shape measurement with a 3D decoding speed of 40.15 fps when the clock frequency is 200MHz, and the image size is 2432×2048.