Vf-constrained ηρ-pareto optimisation of medium frequency transformers in ISOP-DAB converters

• Published in: IET power electronics Vol. 13; no. 10; pp. 1984 - 1994
• Main Authors: Beiranvand, Hamzeh, Rokrok, Esmaeel, Liserre, Marco
• Format: Journal Article
• Language: English
• Published: The Institution of Engineering and Technology 05.08.2020
• Subjects: bridge circuits; brute‐force optimisation; dual‐active bridges; efficiency‐power density pareto optimisation; finite element analysis; ISOP‐DAB converter; Litz wire configuration; medium frequency transformers; mega‐watt range input‐series output‐parallel connected DAB; MFT components; optimisation process; Pareto optimisation; power 1.0 MW; power 3.0 kW; power convertors; power transformers; presented design methodology; Research Article; semiconductors voltage and frequency constraints; simple design methodology; switching frequency; three‐dimensional finite‐element analysis; VF‐constratined ηρ‐pareto optimisation; voltage 10.0 kV; voltage 600.0 V; wires (electric); switching frequency; bridge circuits; Litz wire configuration; MFT components; mega-watt range input-series output-parallel connected DAB; presented design methodology; efficiency-power density pareto optimisation; ISOP-DAB converter; Pareto optimisation; power convertors; power transformers; semiconductors voltage and frequency constraints; brute-force optimisation; three-dimensional finite-element analysis; power 3.0 kW; simple design methodology; finite element analysis; wires (electric); voltage 10.0 kV; VF-constratined ηρ-pareto optimisation; voltage 600.0 V; dual-active bridges; power 1.0 MW; medium frequency transformers; optimisation process
• ISSN: 1755-4535; 1755-4543
• DOI: 10.1049/iet-pel.2019.1159

This study deals with $\eta \rho $ηρ (efficiency-power density) pareto optimisation of medium frequency transformers (MFTs) with considerations of voltage and frequency (Vf) constraints of semiconductors for mega-watt range input-series output-parallel (ISOP) connected dual-active bridges (DABs). A simple design methodology to include the Litz wire configuration in the optimisation process is proposed. Based on the presented design methodology, the effects of the semiconductors blocking voltage and switching frequency on the $\eta \rho $ηρ-pareto optimisation are evaluated. First, an idealised optimisation is carried out to understand the general behaviour of the optimum point. Second, brute-force optimisation is utilised to find the practical optimum solution based on the market availability of MFT components. Designing MFTs for a 1 MW 10 kV/600 V ISOP-DAB converter is the subject of numerical studies. The best trade-off between $\eta \rho \, {\rm and}\, Vf$ηρandVf is selected as the final optimal solution and its design correctness is validated using three-dimensional finite-element analysis. Experimental tests on a 3 kW downscaled MFT prototype show that the proposed method is valid in practice.