Cointegration of the TFT-Type AND Flash Synaptic Array and CMOS Circuits for a Hardware-Based Neural Network

An AND-type flash synaptic array is cointegrated with CMOS circuits using a novel fabrication method. Electrical characteristics of the basic circuit blocks required for neural network operation are verified. By reducing the number of masks and fabrication steps required, the proposed fabrication me...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 70; no. 1; pp. 1 - 6
Main Authors Park, Min-Kyu, Kang, Won-Mook, Koo, Ryun-Han, Kim, Jeong-Hyun, Hwang, Joon, Bae, Jong-Ho, Kim, Jae-Joon, Lee, Jong-Ho
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Arrays
Ash
Circuits
CMOS
CMOS circuits
CMOS compatibility
CMOS technology
Fabrication
Hardware
hardware-based neural network (HNN)
Logic gates
Micromechanical devices
Neural networks
Neurons
Pulse measurements
synaptic array
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Summary:An AND-type flash synaptic array is cointegrated with CMOS circuits using a novel fabrication method. Electrical characteristics of the basic circuit blocks required for neural network operation are verified. By reducing the number of masks and fabrication steps required, the proposed fabrication method successfully integrates synaptic array and CMOS peripheral circuits, including integrate-and-fire (I&F) circuits and passive devices, on a single wafer. The proposed fabrication method provides a methodology for the efficient implementation of hardware-based neural networks as well as verification of excellent compatibility of the proposed synaptic array with CMOS technology.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2022.3220726