A Review, Classification, and Comparative Evaluation of Approximate Arithmetic Circuits

• Published in: ACM journal on emerging technologies in computing systems Vol. 13; no. 4; pp. 1 - 34
• Main Authors: Jiang, Honglan, Liu, Cong, Liu, Leibo, Lombardi, Fabrizio, Han, Jie
• Format: Journal Article
• Language: English
• Published: 01.08.2017
• ISSN: 1550-4832; 1550-4840
• DOI: 10.1145/3094124

Often as the most important arithmetic modules in a processor, adders, multipliers, and dividers determine the performance and energy efficiency of many computing tasks. The demand of higher speed and power efficiency, as well as the feature of error resilience in many applications (e.g., multimedia, recognition, and data analytics), have driven the development of approximate arithmetic design. In this article, a review and classification are presented for the current designs of approximate arithmetic circuits including adders, multipliers, and dividers. A comprehensive and comparative evaluation of their error and circuit characteristics is performed for understanding the features of various designs. By using approximate multipliers and adders, the circuit for an image processing application consumes as little as 47% of the power and 36% of the power-delay product of an accurate design while achieving similar image processing quality. Improvements in delay, power, and area are obtained for the detection of differences in images by using approximate dividers.