Impact of Activation Annealing Temperature on the Performance, Negative Bias Temperature Instability, and Time-to-Dielectric Breakdown Lifetime of High-k/Metal Gate Stack p-Type Metal–Oxide–Semiconductor Field Effect Transistors

• Published in: Japanese Journal of Applied Physics Vol. 48; no. 4S; p. 4
• Main Authors: Sato, Motoyuki, Aoyama, Takayuki, Nara, Yasuo, Ohji, Yuzuru
• Format: Journal Article
• Language: English
• Published: 01.04.2009