Impact of Activation Annealing Temperature on the Performance, Negative Bias Temperature Instability, and Time-to-Dielectric Breakdown Lifetime of High-k/Metal Gate Stack p-Type Metal–Oxide–Semiconductor Field Effect Transistors

Saved in:
Bibliographic Details
Published inJapanese Journal of Applied Physics Vol. 48; no. 4S; p. 4
Main Authors Sato, Motoyuki, Aoyama, Takayuki, Nara, Yasuo, Ohji, Yuzuru
Format Journal Article
LanguageEnglish
Published 01.04.2009
Online AccessGet full text

Cover

More Information
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.48.04C002