Fault Ride Through Strategy of Virtual-Synchronous-Controlled DFIG-Based Wind Turbines Under Symmetrical Grid Faults

Virtual synchronous control (VSynC) in DFIG -based wind turbines (WTs) was studied. It utilizes its relatively "slow" inner potential to enhance the WT's dynamic frequency support capability. However, this will pose more severe challenges on the VSynC - based DFIG under symmetrical gr...

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Bibliographic Details
Published inIEEE transactions on energy conversion Vol. 35; no. 3; pp. 1360 - 1371
Main Authors Wang, Shuo, Shang, Lei
Format Journal Article
LanguageEnglish
Published New York IEEE 01.09.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Virtual synchronous control (VSynC) in DFIG -based wind turbines (WTs) was studied. It utilizes its relatively "slow" inner potential to enhance the WT's dynamic frequency support capability. However, this will pose more severe challenges on the VSynC - based DFIG under symmetrical grid faults than the conventional vector current controlled one. This article mainly studies the fault ride through strategy of the VSynC-based DFIG under symmetrical grid fault. The fault current is limited and the dynamic reactive power support to help grid voltage recovery are studied. Firstly, the transient behavior of the VSynC - based DFIG is analyzed and the influence of the originally existing virtual resistance is studied. In the proposed method, the virtual resistance just works in the forced current component to limit the forced component of the fault current and accelerate the attenuation of the natural flux. Then the dynamic feedforward compensation is employed to trade-off to limit the natural component of the fault current and decay the natural flux component aroused by grid faults. In addition, the fast dynamic reactive power support of during grid faults according to grid codes. On the post-fault, the coordination control of active power is also implemented to limit steady-state rotor current. Finally, simulation and experiment results demonstrate the feasibility and correctness of the proposed fault ride through strategy for the VSynC.
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ISSN:0885-8969
1558-0059
DOI:10.1109/TEC.2020.2979885