Separation of Lateral Migration Components by Hole During the Short-Term Retention Operation in 3-D NAND Flash Memories

• Published in: IEEE transactions on electron devices Vol. 67; no. 6; pp. 2645 - 2647
• Main Authors: Kim, Shinkeun, Kim, Haesoo, Woo, Changbeom, Choi, Gil-Bok, Seo, Moon-Sik, Shim, Hyunyoung, Noh, Keum Hwan, Shin, Hyungcheol
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.06.2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 3-D NAND flash; Charge carrier processes; Electrons; lateral migration by hole (LMH); Levels; Limiting; Loss measurement; program verify level 1 (PV1) state; residual hole; Retention; Semiconductor device measurement; Short term; short-term retention; stretched exponential function; Temperature dependence; Temperature measurement
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2020.2989734

In this brief, we modeled the charge loss in the program verify level 1 (PV1) during the short-term retention operation. As a result, we confirmed that the charge loss in the lateral direction [lateral migration (LM)] was affected by the residual hole at the edge of the target word line (WL). Unlike the other PV levels, LM could be modeled separately in the PV1 by LM caused by electrons (LME) and LM caused by the residual hole (LMH). Also, PV1, which stores a relatively small amount of electrons compared to the other PV levels, was hardly affected by the adjacent cells, so there was almost no difference between solid (S/P) and checker-board (C/P). In order to model the PV1 state, we carried out the modeling considering the four charge loss mechanisms based on the short-term retention data measured at various temperatures (25-115 °C).