Two Memristors-Based XOR Logic Demonstrated With Encryption/Decryption
In this study, an optimized XOR logic gate is briefly proposed based on memristors. The proposed XOR exhibits a simple structure that comprises two memristors; it requires merely two steps to complete logic. The inputs of the gate are applied by voltage and memristive resistance, and the output is s...
Saved in:
Published in | IEEE electron device letters Vol. 42; no. 9; pp. 1398 - 1401 |
---|---|
Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.09.2021
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
ISSN | 0741-3106 1558-0563 |
DOI | 10.1109/LED.2021.3102678 |
Cover
Loading…
Summary: | In this study, an optimized XOR logic gate is briefly proposed based on memristors. The proposed XOR exhibits a simple structure that comprises two memristors; it requires merely two steps to complete logic. The inputs of the gate are applied by voltage and memristive resistance, and the output is stored as the resistance value of the output cell. Furthermore, the encryption and decryption based on such a circuit have been verified by performing a parallel electrical test successfully. At the same time, the parallel scheme and the cascaded serial scheme are compared in detail. Moreover, the mentioned energy-efficient circuit helps achieve more complex logic functions. Abiding by Kirchhoff's law, the effect of the memory window and the variation of devices' parameter on the calculation accuracy has been further analyzed in depth, which helps develop a complete binary logic calculation theory. On that basis, a digital in-memory calculation system can be more effectively built based on memristors. |
---|---|
Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2021.3102678 |