Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation

A design methodology of ferroelectric (FE) negative capacitance FETs (NCFETs) based on the concept of capacitance matching is presented. A new mode of NCFET operation, called the "antiferroelectric mode" is proposed, which, besides achieving sub-60mV/dec subthreshold swing, can significant...

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Bibliographic Details
Published in2011 International Electron Devices Meeting pp. 11.3.1 - 11.3.4
Main Authors Khan, A. I., Yeung, C. W., Chenming Hu, Salahuddin, S.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2011
Subjects
Capacitance
CMOS integrated circuits
Hysteresis
Iron
Logic gates
MOSFET circuits
Performance evaluation
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Summary:A design methodology of ferroelectric (FE) negative capacitance FETs (NCFETs) based on the concept of capacitance matching is presented. A new mode of NCFET operation, called the "antiferroelectric mode" is proposed, which, besides achieving sub-60mV/dec subthreshold swing, can significantly boost the on-current in exchange for a nominal hysteresis. Design considerations for different device parameters (FE thickness, EOT, source/drain overlap & gate length) are explored. It is suggested that relative improvement in device performance due to FE negative capacitance becomes more significant in very short channel length devices because of the increased drain-to-channel coupling.
ISBN:1457705060
9781457705069
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2011.6131532