A 700uA, 405MHz fractional-N All digital frequency-locked loop for MICS band applications

An all-digital frequency-locked loop (ADFLL) based frequency synthesizer with a built-in FSK modulator for medical implants communication systems (MICS) band applications is presented. The ADFLL uses a high resolution single-bit digital ΣΔ frequency discriminator in the feedback path and a ΣΔ phase...

Full description

Saved in:
Bibliographic Details
Published in2010 IEEE Radio Frequency Integrated Circuits Symposium pp. 409 - 412
Main Authors Shashidharan, S, Khalil, W, Chakraborty, S, Kiaei, S, Copani, T, Bakkaloglu, B
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.01.2010
Subjects
Digital filters
digital PLLs
Feedback
Frequency locked loops
Frequency shift keying
Frequency synthesizers
Implants
Microwave integrated circuits
Noise measurement
Phase measurement
Phase noise
type-I PLLs
ΣΔ DACs
Online AccessGet full text

Cover

More Information
Summary:An all-digital frequency-locked loop (ADFLL) based frequency synthesizer with a built-in FSK modulator for medical implants communication systems (MICS) band applications is presented. The ADFLL uses a high resolution single-bit digital ΣΔ frequency discriminator in the feedback path and a ΣΔ phase accumulator in the reference path, achieving fractional resolution. The ADFLL uses a digital IIR-based loop filter followed by a digital-intensive ΣΔ current-steering DAC and a first-order-hold filter. The ADFLL achieves 9.5Hz frequency resolution, spanning the ISM 400MHz-410MHz band. The worst-case near-integer spur of -55dBc and a phase noise of -83dBc/Hz at 300kHz offset is measured. The ADFLL is fabricated on a 0.18um CMOS process, occupying 0.14mm 2 die area, with a quiescent current consumption of 700uA.
ISBN:9781424462407
1424462401
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2010.5477249