Analysis of the dV/dt effect on an IGBT gate circuit in IPM

The effect ofdV/dt on the IGBT gate circuit in IPM is analyzed both by simulation and experiment. It is shown that a voltage slope applied across the collector-emitter terminals of the IGBT can induce a gate voltage spike through the feedback action of the parasitic capacitances of the IGBT. The dV/...

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Bibliographic Details
Published inJournal of semiconductors Vol. 34; no. 4; pp. 64 - 68
Main Author 华庆 李泽宏 张波 黄祥钧 程德凯
Format Journal Article
LanguageEnglish
Published 01.04.2013
Subjects
Capacitance
dt
dV
Electric potential
Gate circuits
Gates (circuits)
IGBT
IPM
Semiconductors
Spikes
Terminals
Voltage
寄生电容
栅极
电压尖峰
电路
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ISSN1674-4926
DOI10.1088/1674-4926/34/4/045001

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Summary:The effect ofdV/dt on the IGBT gate circuit in IPM is analyzed both by simulation and experiment. It is shown that a voltage slope applied across the collector-emitter terminals of the IGBT can induce a gate voltage spike through the feedback action of the parasitic capacitances of the IGBT. The dV/dt rate, gate-collector capacitance, gate-emitter capacitance and gate resistance have a direct influence on this voltage spike. The device with a higher dV/dt rate, gate-collector capacitance, gate resistance and lower gate-emitter capacitance is more prone to dV/dt induced self turn-on. By optimizing these parameters, the dV/dt induced voltage spike can be effectively controlled.
Bibliography:The effect ofdV/dt on the IGBT gate circuit in IPM is analyzed both by simulation and experiment. It is shown that a voltage slope applied across the collector-emitter terminals of the IGBT can induce a gate voltage spike through the feedback action of the parasitic capacitances of the IGBT. The dV/dt rate, gate-collector capacitance, gate-emitter capacitance and gate resistance have a direct influence on this voltage spike. The device with a higher dV/dt rate, gate-collector capacitance, gate resistance and lower gate-emitter capacitance is more prone to dV/dt induced self turn-on. By optimizing these parameters, the dV/dt induced voltage spike can be effectively controlled.
11-5781/TN
IGBT; dV/dt; voltage spike; IPM
Hua Qing, Li Zehong, Zhang Bo, Huang Xiangjun, and Cheng Dekai（ 1 State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China 2Midea Air-Conditioning ＆ Refrigeration Research Institute, Foshan 528311, China）
ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
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ISSN:1674-4926
DOI:10.1088/1674-4926/34/4/045001