Bulldozer: An Approach to Multithreaded Compute Performance

AMD bulldozer module represents a new direction in microarchitecture and includes a number of firsts for AMD, including AMD multithreaded X86 processor, implementation of a shared level 2 cache, and X86 processor to incorporate floating-point multiply-accumulate (FMAC). This article discusses the mo...

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Bibliographic Details
Published inIEEE MICRO Vol. 31; no. 2; pp. 6 - 15
Main Authors Butler, M, Barnes, L, Sarma, D D, Gelinas, B
Format Journal Article
LanguageEnglish
Published Los Alamitos IEEE 01.03.2011
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Bandwidth
Bandwidths
Bulldozer
Computer architecture
Decoding
Hardware
Instruction sets
microarchitecture implementation considerations
microcomputers
Microprocessors
Multithreading
Personal computers
Pipeline processing
processor architectures
Throughput
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Summary:AMD bulldozer module represents a new direction in microarchitecture and includes a number of firsts for AMD, including AMD multithreaded X86 processor, implementation of a shared level 2 cache, and X86 processor to incorporate floating-point multiply-accumulate (FMAC). This article discusses the module multithreading architecture, power-efficient micro architecture, and subblocks, including the various microarchitectural latencies, bandwidths, and structure sizes.
ISSN:0272-1732
1937-4143
DOI:10.1109/MM.2011.23