Clocked-sense-amplifier-based smart-pixel optical receivers

• Published in: IEEE photonics technology letters Vol. 8; no. 8; pp. 1067 - 1069
• Main Authors: Woodward, T.K., Krishnamoorthy, A.V., Goossen, K.W., Walker, J.A., Cunningham, J.E., Jan, W.Y., Chirovsky, L.M.F., Hui, S.P., Tseng, B., Kossives, D., Dahringer, D., Bacon, D., Leibenguth, R.E.
• Format: Journal Article
• Language: English
• Published: IEEE 01.08.1996
• Subjects: Circuit simulation; Clocks; Design; Detectors; Foundries; Optical amplifiers; Optical design; Optical feedback; Optical receivers; Q1; Quantum well devices; Semiconductor optical amplifiers
• ISSN: 1041-1135; 1941-0174
• DOI: 10.1109/68.508740

We introduce the concept of synchronous smart-pixel optical receivers, and present the first use of a clocked-sense amplifier as a smart-pixel optical receiver. Such a receiver uses the controlled application of positive feedback to obtain low-power compact digital amplification. We describe the design and simulation of two types of optical receivers based on a clamped bit-line sense amplifier (CBLSA), and a conventional sense amplifier (CSA). Both of these circuits have been realized in 0.8 micron-linewidth foundry CMOS with hybrid-bonded GaAs-AlGaAs MQW detectors and modulators attached to the circuit. Operation in excess of 750 Mb/s is demonstrated, within a layout area of 44 μm×22 μm, with a bias-dependent estimated power dissipation of 1 to 2 mW. Operation with one or two input beams is possible, with approximate minimum detected photocurrent levels at 320 Mb/s of 8 μA (/spl sim/100 fJ) for single-beam operation and 2.5 μA/beam (/spl sim/30 fJ/beam) for two-beam operation, all in the CBLSA-based circuit.