A reduced-complexity finite field ALU

Computation by homomorphic images has been shown to be a viable technique for the VLSI implementation of real and complex arithmetic. Embedding the integers or the Gaussian integers into a direct sum of Galois fields has led to finite computational structures, which are multiplier-free; multiplicati...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on circuits and systems Vol. 38; no. 12; pp. 1571 - 1573
Main Authors Zelniker, G., Taylor, F.J.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.12.1991
Institute of Electrical and Electronics Engineers
Subjects
Algorithm design and analysis
Applied sciences
Arithmetic
Cathode ray tubes
Digital signal processing
Electronics
Embedded computing
Exact sciences and technology
Galois fields
Hardware
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal design
Signal processing algorithms
Very large scale integration
Finite field
Online AccessGet full text

Cover

More Information
Summary:Computation by homomorphic images has been shown to be a viable technique for the VLSI implementation of real and complex arithmetic. Embedding the integers or the Gaussian integers into a direct sum of Galois fields has led to finite computational structures, which are multiplier-free; multiplication is replaced with finite field logarithm addition. While this led to an efficient realization of multiplication, addition was made more difficult. The authors propose a scheme to allow both addition and multiplication with finite field logarithms that alleviates the earlier difficulties with addition and leads to a more compact hardware realization.< >
ISSN:0098-4094
1558-1276
DOI:10.1109/31.108514