SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram

This work proposes a methodology to estimate the statistical distribution of the probability that a 6T bit-cell starts up to a given logic value in SRAM memories for PUF applications. First, the distribution is obtained experimentally in a 65-nm CMOS device. As this distribution cannot be reproduced...

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Bibliographic Details
Published inElectronics (Basel) Vol. 11; no. 1; p. 135
Main Authors Torrens, Gabriel, Alheyasat, Abdel, Alorda, Bartomeu, Bota, Sebastià A.
Format Journal Article
LanguageEnglish
Published Basel MDPI AG 01.01.2022
Subjects
Digital signatures
Error correction & detection
Internet of Things
Noise
Parameters
Probability
Reliability aspects
Static random access memory
Statistical analysis
Transistors
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Summary:This work proposes a methodology to estimate the statistical distribution of the probability that a 6T bit-cell starts up to a given logic value in SRAM memories for PUF applications. First, the distribution is obtained experimentally in a 65-nm CMOS device. As this distribution cannot be reproduced by electrical simulation, we explore the use of an alternative parameter defined as the distance between the origin and the separatrix in the bit-cell state space to quantify the mismatch of the cell. The resulting distribution of this parameter obtained from Monte Carlo simulations is then related to the start-up probability distribution using a two-component logistic function. The reported results show that the proposed imbalance factor is a good predictor for PUF-related reliability estimation with the advantage that can be applied at the early design stages.
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics11010135