High-Mobility SiC MOSFETs Using a Thin-SiO2/Al2O3 Gate Stack

We report the development of a low-temperature (600 °C) gate oxidation approach to minimize the density of interface traps (DIT) at the SiC/SiO2 interface, ultimately leading to a significantly higher channel mobility in SiC MOSFETs of 81 cm2·V-1·s-1, >11x higher than devices fabricated alongside...

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Bibliographic Details
Published inMaterials science forum Vol. 924; pp. 494 - 497
Main Authors Urresti, Jesus, Vassilevski, Konstantin, Tiwari, Amit Kumar, O'Neill, Anthony G., Arith, Faiz, Wright, Nick G., Olsen, Sarah
Format Journal Article
LanguageEnglish
Published Pfaffikon Trans Tech Publications Ltd 05.06.2018
Subjects
Aluminum oxide
MOSFETs
Oxidation
Silicon dioxide
Mobility
MOSFET
Gate Oxide
Interface Traps
SiO2/SiC Interface
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Summary:We report the development of a low-temperature (600 °C) gate oxidation approach to minimize the density of interface traps (DIT) at the SiC/SiO2 interface, ultimately leading to a significantly higher channel mobility in SiC MOSFETs of 81 cm2·V-1·s-1, >11x higher than devices fabricated alongside but with a conventional 1150 °C gate oxide. We further report on the comparison made between the DIT and channel mobilities of MOS capacitors and n-MOSFETs fabricated using the low-and high-temperature gate oxidation.
Bibliography:Selected, peer reviewed papers from the 2017 International Conference on Silicon Carbide and Related Materials (ICSCRM 2017), September 17-22, 2017, Washington, DC, USA
ISSN:0255-5476
1662-9752
1662-9752
DOI:10.4028/www.scientific.net/MSF.924.494