Design and implementation of optimized 2D FIR symmetric filter architecture using modified McClellan transformation and CSD-CSE
In this paper, an optimized and high-performance Two Dimensional-Finite Impulse Response (2D-FIR) filter is designed and hardware architecture is implemented for real-time image processing applications. The higher-order circular symmetric 2D-FIR filter is designed using a modified McClellan Transfor...
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| Published in | Multidimensional systems and signal processing Vol. 36; no. 1 |
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| Main Authors | , , , |
| Format | Journal Article |
| Language | English |
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01.12.2025
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| Abstract | In this paper, an optimized and high-performance Two Dimensional-Finite Impulse Response (2D-FIR) filter is designed and hardware architecture is implemented for real-time image processing applications. The higher-order circular symmetric 2D-FIR filter is designed using a modified McClellan Transformation a P4 transformation. The designed filter coefficients are represented by the Canonical Signed Digit (CSD) number format to attain the multiplierless design. Further, the Common Subexpression Elimination (CSE) technique is utilized to reduce the number of adders of the CSD-based 2D-FIR filter architecture. The Fully Direct Form (FDF) structure is considered to implement the proposed architecture. The designed 2D-FIR FDF architecture is coded by HDL according to the structure and synthesized by Cadence tools in a 45 nm CMOS technology library. The Delay, Power, and Area reports were generated by the Genus synthesis tool and compared with the state-of-the-art works. Significant improvements are observed in the proposed 2D filter architecture. The proposed 2D-FIR filter architecture has a decreased maximum of 10.48 times and a minimum of 1.18 times of Area Delay Product (ADP), as well as a decreased maximum of 10.69 times and a minimum of 1.063 times of Power Delay Product (PDP). |
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| AbstractList | In this paper, an optimized and high-performance Two Dimensional-Finite Impulse Response (2D-FIR) filter is designed and hardware architecture is implemented for real-time image processing applications. The higher-order circular symmetric 2D-FIR filter is designed using a modified McClellan Transformation a P4 transformation. The designed filter coefficients are represented by the Canonical Signed Digit (CSD) number format to attain the multiplierless design. Further, the Common Subexpression Elimination (CSE) technique is utilized to reduce the number of adders of the CSD-based 2D-FIR filter architecture. The Fully Direct Form (FDF) structure is considered to implement the proposed architecture. The designed 2D-FIR FDF architecture is coded by HDL according to the structure and synthesized by Cadence tools in a 45 nm CMOS technology library. The Delay, Power, and Area reports were generated by the Genus synthesis tool and compared with the state-of-the-art works. Significant improvements are observed in the proposed 2D filter architecture. The proposed 2D-FIR filter architecture has a decreased maximum of 10.48 times and a minimum of 1.18 times of Area Delay Product (ADP), as well as a decreased maximum of 10.69 times and a minimum of 1.063 times of Power Delay Product (PDP). In this paper, an optimized and high-performance Two Dimensional-Finite Impulse Response (2D-FIR) filter is designed and hardware architecture is implemented for real-time image processing applications. The higher-order circular symmetric 2D-FIR filter is designed using a modified McClellan Transformation a P4 transformation. The designed filter coefficients are represented by the Canonical Signed Digit (CSD) number format to attain the multiplierless design. Further, the Common Subexpression Elimination (CSE) technique is utilized to reduce the number of adders of the CSD-based 2D-FIR filter architecture. The Fully Direct Form (FDF) structure is considered to implement the proposed architecture. The designed 2D-FIR FDF architecture is coded by HDL according to the structure and synthesized by Cadence tools in a 45 nm CMOS technology library. The Delay, Power, and Area reports were generated by the Genus synthesis tool and compared with the state-of-the-art works. Significant improvements are observed in the proposed 2D filter architecture. The proposed 2D-FIR filter architecture has a decreased maximum of 10.48 times and a minimum of 1.18 times of Area Delay Product (ADP), as well as a decreased maximum of 10.69 times and a minimum of 1.063 times of Power Delay Product (PDP). |
| ArticleNumber | 1 |
| Author | Odugu, Venkata Krishna Rao, Bitra Janardhana Raju, U. Appala Bojjawar, Satish |
| Author_xml | – sequence: 1 givenname: Venkata Krishna surname: Odugu fullname: Odugu, Venkata Krishna email: venkatakrishna.odugu@gmail.com organization: ECE Department, CVR College of Engineering – sequence: 2 givenname: Bitra Janardhana surname: Rao fullname: Rao, Bitra Janardhana organization: ECE Department, CVR College of Engineering – sequence: 3 givenname: Satish surname: Bojjawar fullname: Bojjawar, Satish organization: ECE Department, CVR College of Engineering – sequence: 4 givenname: U. Appala surname: Raju fullname: Raju, U. Appala organization: ECE Department, Geethanjali College of Engineering and Technology |
| BookMark | eNp9kE1rGzEQhkVxoY7TP9CTIGc1I2nXuz6GtfMBKYG6PQtZO3JldiVXkg_OpX89crbQW-cyDLzPO_BckZkPHgn5wuErB2huE-dQ1QxExQDaVc34BzLndSMZtKKakTmshGTLcnwiVykdAArGl3PyZ43J7T3VvqduPA44os86u-BpsDQcsxvdK_ZUrOn903eazuOIOTpDrRsyRqqj-eUymnyKSE_J-T0dQ--sK8w30w04DNrTHLVPNsRxar4867Zr1m031-Sj1UPCz3_3gvy83_zoHtnzy8NTd_fMjGggs5XtK8vbxkoNAutd0-6EkLVBYxGF0b3ZaYEg9dLaGooMI3G3FFJUhWsNyAW5mXqPMfw-YcrqEE7Rl5dKcl5XLcgyCyKmlIkhpYhWHaMbdTwrDuoiWk2iVRGt3kUrXiA5QamE_R7jv-r_UG9mzoRL |
| Cites_doi | 10.1049/ip-cdt:19990201 10.1002/cta.3114 10.1007/978-981-32-9775-3_71 10.1002/cta.4102 10.1109/TCSI.2022.3165469 10.1109/TMSCS.2017.2695588 10.1007/978-981-32-9775-3_78 10.1109/TCSI.2013.2265953 10.1016/j.vlsi.2022.01.004 10.1109/TCSII.2024.3352506 10.1109/ACCESS.2022.3192619 10.1109/TCSI.2018.2889260 10.1016/j.compeleceng.2024.109301 10.1007/s10470-021-01853-8 10.1016/j.dsp.2022.103842 10.12688/f1000research.126067.1 10.1007/s00034-018-0897-2 10.1109/TCSI.2021.3061766 10.1007/978-981-10-7868-2_42 10.1007/s00034-017-0698-z 10.4236/jsip.2012.33044 10.1007/s11045-020-00714-3 10.1007/s00034-022-02232-y 10.1016/j.engappai.2012.02.010 10.1007/s00034-020-01539-y 10.1109/TCS.1976.1084236 10.1007/s00034-021-01836-0 10.1109/TCSI.2010.2078730 10.1109/TENCON.2016.7848561 10.1109/TENCON.2019.8929423 10.1109/TENCON.2008.4766758 10.1109/IDT.2013.6727130 |
| ContentType | Journal Article |
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| Copyright_xml | – notice: The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2024. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
| DBID | AAYXX CITATION |
| DOI | 10.1007/s11045-024-00895-1 |
| DatabaseName | CrossRef |
| DatabaseTitle | CrossRef |
| DatabaseTitleList | |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering |
| EISSN | 1573-0824 |
| ExternalDocumentID | 10_1007_s11045_024_00895_1 |
| GroupedDBID | -5B -5G -BR -EM -Y2 -~C .DC .VR 06D 0R~ 0VY 123 1N0 1SB 2.D 203 28- 29M 29~ 2J2 2JN 2JY 2KG 2KM 2LR 2P1 2VQ 2~H 30V 4.4 406 408 409 40D 40E 5QI 5VS 67Z 6NX 8TC 95- 95. 95~ 96X AAAVM AABHQ AACDK AAHNG AAIAL AAJBT AAJKR AANZL AARHV AARTL AASML AATNV AATVU AAUYE AAWCG AAYIU AAYQN AAYTO AAYZH ABAKF ABBBX ABBXA ABDZT ABECU ABFTV ABHLI ABHQN ABJNI ABJOX ABKCH ABKTR ABMNI ABMQK ABNWP ABQBU ABQSL ABSXP ABTEG ABTHY ABTKH ABTMW ABULA ABWNU ABXPI ACAOD ACBXY ACDTI ACGFS ACHSB ACHXU ACIWK ACKNC ACMDZ ACMLO ACOKC ACOMO ACPIV ACZOJ ADHHG ADHIR ADINQ ADKNI ADKPE ADMLS ADRFC ADTPH ADURQ ADYFF ADZKW AEBTG AEFIE AEFQL AEGAL AEGNC AEJHL AEJRE AEKMD AEMSY AENEX AEOHA AEPYU AESKC AETLH AEVLU AEXYK AFBBN AFEXP AFGCZ AFLOW AFQWF AFWTZ AFZKB AGAYW AGDGC AGGDS AGJBK AGMZJ AGQEE AGQMX AGRTI AGWIL AGWZB AGYKE AHAVH AHBYD AHKAY AHSBF AHYZX AIAKS AIGIU AIIXL AILAN AITGF AJBLW AJRNO AJZVZ ALMA_UNASSIGNED_HOLDINGS ALWAN AMKLP AMXSW AMYLF AMYQR AOCGG ARCEE ARMRJ ASPBG AVWKF AXYYD AYJHY AZFZN B-. BA0 BBWZM BDATZ BGNMA BSONS CAG COF CS3 CSCUP DDRTE DL5 DNIVK DPUIP DU5 EBLON EBS EIOEI EJD ESBYG FEDTE FERAY FFXSO FIGPU FINBP FNLPD FRRFC FSGXE FWDCC GGCAI GGRSB GJIRD GNWQR GQ6 GQ7 GQ8 GXS H13 HF~ HG5 HG6 HMJXF HQYDN HRMNR HVGLF HZ~ I09 IHE IJ- IKXTQ ITM IWAJR IXC IZIGR IZQ I~X I~Z J-C J0Z JBSCW JCJTX JZLTJ KDC KOV KOW LAK LLZTM M4Y MA- N2Q NB0 NDZJH NPVJJ NQJWS NU0 O9- O93 O9G O9I O9J OAM OVD P19 P2P P9P PF0 PT4 PT5 QOK QOS R4E R89 R9I RHV RNI RNS ROL RSV RZC RZE RZK S16 S1Z S26 S27 S28 S3B SAP SCLPG SCV SDH SDM SEG SHX SISQX SJYHP SNE SNPRN SNX SOHCF SOJ SPISZ SRMVM SSLCW STPWE SZN T13 T16 TEORI TSG TSK TSV TUC U2A UG4 UOJIU UTJUX UZXMN VC2 VFIZW W23 W48 WK8 YLTOR Z45 Z7R Z7X Z83 Z88 Z8M Z8R Z8W Z92 ZMTXR _50 ~A9 ~EX AAPKM AAYXX ABBRH ABDBE ABFSG ACSTC ADHKG AEZWR AFDZB AFHIU AFOHR AGQPQ AHPBZ AHWEU AIXLP ATHPR AYFIA CITATION ABRTQ |
| ID | FETCH-LOGICAL-c270t-9fd4f187f3a02e5b78b2235cecfee2cadcba2e03a6ff50110c3eb62324d4f8c03 |
| IEDL.DBID | U2A |
| ISSN | 0923-6082 |
| IngestDate | Fri Jul 25 11:08:16 EDT 2025 Tue Jul 01 02:06:53 EDT 2025 Fri Feb 21 02:40:00 EST 2025 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 1 |
| Keywords | 2D FIR filter CSE Multiplierless design CSD McClellan transformation |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c270t-9fd4f187f3a02e5b78b2235cecfee2cadcba2e03a6ff50110c3eb62324d4f8c03 |
| Notes | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| PQID | 3115480333 |
| PQPubID | 2043747 |
| ParticipantIDs | proquest_journals_3115480333 crossref_primary_10_1007_s11045_024_00895_1 springer_journals_10_1007_s11045_024_00895_1 |
| ProviderPackageCode | CITATION AAYXX |
| PublicationCentury | 2000 |
| PublicationDate | 2025-12-01 |
| PublicationDateYYYYMMDD | 2025-12-01 |
| PublicationDate_xml | – month: 12 year: 2025 text: 2025-12-01 day: 01 |
| PublicationDecade | 2020 |
| PublicationPlace | New York |
| PublicationPlace_xml | – name: New York |
| PublicationSubtitle | An International Journal |
| PublicationTitle | Multidimensional systems and signal processing |
| PublicationTitleAbbrev | Multidim Syst Sign Process |
| PublicationYear | 2025 |
| Publisher | Springer US Springer Nature B.V |
| Publisher_xml | – name: Springer US – name: Springer Nature B.V |
| References | Mersereau, Mecklenbräuker, Quatier (CR20) 1976; 23 Odugu, Venkata Narasimhulu, Satya Prasad (CR29) 2022; 18 Mohamed, Sayed, Radwan, Said (CR21) 2022; 69 Chowdari, Seventline (CR7) 2023; 12 Khan, Alhartomi, Alzahrani, Shaik, Alsulami (CR9) 2022; 10 Odugu, Satya (CR26) 2021; 49 CR19 Shrivastava, Kumar, Tiwari, Dhawan (CR32) 2021; 40 Sudhashree, Muthukumaran (CR36) 2015; 10 Singh, Manoj (CR33) 2022; 12 Bindima, Elias (CR3) 2019; 66 CR34 Li, Zhao, Xu, Sun (CR14) 2022; 41 Vijetha, Rajendra Naik (CR37) 2023; 14 Bindima, Shahanas, Elias (CR4) 2018; 65 Zhang, Luo, Zhao, Zhao, Lu (CR40) 2024 Alawad, Lin (CR1) 2017; 4 Chowdari, Seventline (CR6) 2022; 30 Odugu, Venkata Narasimhulu, Satya Prasad (CR27) 2020; 31 Mohanty, Meher (CR22) 2019; 146 Wu, Zhan, Peng, Ji, Yu, Zhao, Wang (CR38) 2021; 68 Arumalla, Madhavi (CR2) 2018 Manuel, Elias (CR18) 2013; 26 CR5 Shrivastava, Kumar, Tiwari, Dhawan (CR31) 2020; 2018 Mohanty, Meher, Al-Maadeed, Amira (CR23) 2014; 61 Christilda, Milton (CR8) 2022; 108 Kumar, Shrivastava, Tiwari, Mishra (CR11) 2019; 38 CR25 Liu, Tai (CR16) 2010; 58 CR24 Sreelekha, Bindiya (CR35) 2023; 133 Kumar, Shrivastava, Tiwari, Dhawan, Dutta, Kar, Kumar, Bhadauria (CR12) 2020 Reddy, Juliet, Thuraka, Odugu (CR30) 2024; 118 Xu, Zhang, Zhao, Xhafa, Patnaik, Tavana (CR39) 2019 Odugu, Venkata Narasimhulu, Satya Prasad (CR28) 2022; 84 Kumar, Akurati, Reddy, Cheemalakonda, Chagarlamudi, Dasari, Shaik (CR13) 2023; 42 Kumar, Shrivastava, Tiwari, Dhawan (CR10) 2018; 37 Li, Jiaxiang, Wei (CR15) 2024 Manuel, Elias (CR17) 2012; 3 VK Odugu (895_CR26) 2021; 49 Y Li (895_CR14) 2022; 41 BK Mohanty (895_CR22) 2019; 146 PC Shrivastava (895_CR31) 2020; 2018 895_CR5 KR Sreelekha (895_CR35) 2023; 133 R Sudhashree (895_CR36) 2015; 10 CP Chowdari (895_CR7) 2023; 12 A Arumalla (895_CR2) 2018 M Manuel (895_CR17) 2012; 3 895_CR34 T Bindima (895_CR3) 2019; 66 Venkata Krishna Odugu (895_CR27) 2020; 31 K Vijetha (895_CR37) 2023; 14 P Kumar (895_CR11) 2019; 38 TC Singh (895_CR33) 2022; 12 VK Odugu (895_CR28) 2022; 84 Y Li (895_CR15) 2024 BK Mohanty (895_CR23) 2014; 61 J-C Liu (895_CR16) 2010; 58 RM Mersereau (895_CR20) 1976; 23 SM Mohamed (895_CR21) 2022; 69 PC Shrivastava (895_CR32) 2021; 40 W Xu (895_CR39) 2019 P Kumar (895_CR10) 2018; 37 VK Odugu (895_CR29) 2022; 18 J Wu (895_CR38) 2021; 68 P Kumar (895_CR12) 2020 895_CR24 895_CR25 VS Reddy (895_CR30) 2024; 118 VD Christilda (895_CR8) 2022; 108 GK Kumar (895_CR13) 2023; 42 M Manuel (895_CR18) 2013; 26 895_CR19 M Alawad (895_CR1) 2017; 4 MT Khan (895_CR9) 2022; 10 T Bindima (895_CR4) 2018; 65 W Zhang (895_CR40) 2024 CP Chowdari (895_CR6) 2022; 30 |
| References_xml | – volume: 14 start-page: 56 issue: 02 year: 2023 end-page: 59 ident: CR37 article-title: High-speed, low Area architecture of 2-D Block FIR Filter Using DA publication-title: Journal of Engineering Sciences – volume: 146 start-page: 91 issue: 2 year: 2019 end-page: 99 ident: CR22 article-title: High throughput and low-latency implementation of bit-level systolic architecture for 1D and 2D digital filters publication-title: IEE Proceedings-Computers and Digital Techniques doi: 10.1049/ip-cdt:19990201 – volume: 49 start-page: 3653 issue: 11 year: 2021 end-page: 3668 ident: CR26 article-title: An efficient VLSI architecture of 2-D finite impulse response filter using enhanced approximate compressor circuits publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.3114 – volume: 2018 start-page: 787 year: 2020 end-page: 796 ident: CR31 article-title: A Brief Survey on Hardware Realization of Two-Dimensional Adaptive Filters publication-title: Advances in VLSI, Communication, and Signal Processing: Select Proceedings of VCAS doi: 10.1007/978-981-32-9775-3_71 – year: 2024 ident: CR15 article-title: A novel design algorithm for low complexity sparse 2-D FIR filters publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.4102 – volume: 69 start-page: 2885 issue: 7 year: 2022 end-page: 2892 ident: CR21 article-title: FPGA implementation of reconfigurable CORDIC algorithm and a memristive chaotic system with transcendental nonlinearities publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2022.3165469 – volume: 4 start-page: 69 issue: 1 year: 2017 end-page: 82 ident: CR1 article-title: Memory-efficient probabilistic 2-D finite impulse response (FIR) filter publication-title: IEEE Transactions on Multi-Scale Computing Systems doi: 10.1109/TMSCS.2017.2695588 – start-page: 861 year: 2020 end-page: 882 ident: CR12 article-title: Realization of efficient architectures for digital filters a survey publication-title: Advances in VLSI communication and signal processing select proceedings of VCAS 2018 doi: 10.1007/978-981-32-9775-3_78 – ident: CR25 – volume: 61 start-page: 120 issue: 1 year: 2014 end-page: 133 ident: CR23 article-title: Memory footprint reduction for power-efficient realization of 2-D finite impulse response filters publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2013.2265953 – volume: 84 start-page: 12 year: 2022 end-page: 25 ident: CR28 article-title: A novel filter-bank architecture of 2D-FIR symmetry filters using LUT-based multipliers publication-title: Integration doi: 10.1016/j.vlsi.2022.01.004 – volume: 12 start-page: 3684 issue: 4 year: 2022 ident: CR33 article-title: Design and implementation of two-dimensional digital finite impulse response filter using very high speed integrated circuit hardware description language publication-title: International Journal of Electrical and Computer Engineering – year: 2024 ident: CR40 publication-title: Design of optimal multiplierless FRM-based wideband channelizer With STB doi: 10.1109/TCSII.2024.3352506 – ident: CR19 – volume: 30 start-page: 89 issue: 1 year: 2022 end-page: 103 ident: CR6 article-title: Realization of multiplexer logic-based 2-D Block FIR filter using distributed arithmetic publication-title: Computer Assisted Methods in Engineering and Science – volume: 65 start-page: 2057 issue: 12 year: 2018 end-page: 2061 ident: CR4 article-title: Low complexity fan filters using multiobjective artificial bee colony optimization aided McClellan Transformation for directional filtering publication-title: IEEE Transactions on Circuits and Systems II: Express Briefs – volume: 10 start-page: 76693 year: 2022 end-page: 76706 ident: CR9 article-title: Two distributed arithmetic based high throughput architectures of non-pipelined LMS adaptive filters publication-title: IEEE Access doi: 10.1109/ACCESS.2022.3192619 – volume: 66 start-page: 2298 issue: 6 year: 2019 end-page: 2308 ident: CR3 article-title: Low-complexity 2-D digital FIR filters using polyphase decomposition and farrow structure publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2018.2889260 – volume: 118 start-page: 109301 year: 2024 ident: CR30 article-title: Implementation of block-based diagonal and quadrantal symmetry type 2D-FIR filter architectures using DA technique publication-title: Computers and Electrical Engineering doi: 10.1016/j.compeleceng.2024.109301 – start-page: 540 year: 2019 end-page: 549 ident: CR39 article-title: Design of sparse two-dimensional FIR notch filter based on BP neural network publication-title: Advances in intelligent, interactive systems and applications. IISA 2018. Advances in intelligent systems and computing – volume: 108 start-page: 323 issue: 2 year: 2022 end-page: 333 ident: CR8 article-title: Speed, power and area efficient 2D FIR digital filter using vedic multiplier with predictor and reusable logic publication-title: Analog Integrated Circuits and Signal Processing doi: 10.1007/s10470-021-01853-8 – volume: 133 year: 2023 ident: CR35 article-title: Design of cost-effective variable bandwidth 2D low-pass, high-pass and band-pass filters with improved circularity publication-title: Digital Signal Processing doi: 10.1016/j.dsp.2022.103842 – volume: 12 start-page: 1182 year: 2023 ident: CR7 article-title: Implementation of distributed arithmetic-based symmetrical 2D block finite impulse response filter architectures publication-title: F1000Research doi: 10.12688/f1000research.126067.1 – volume: 38 start-page: 1099 year: 2019 end-page: 1113 ident: CR11 article-title: High-throughput, area-efficient architecture of 2-D block FIR filter using distributed arithmetic algorithm publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-018-0897-2 – volume: 68 start-page: 2522 issue: 6 year: 2021 end-page: 2534 ident: CR38 article-title: Efficient design of spiking neural network with STDP learning based on fast CORDIC publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2021.3061766 – volume: 10 start-page: 16101 issue: 20 year: 2015 end-page: 16105 ident: CR36 article-title: Analysis of low complexity memory footprint reduction for delay and area efficient realization of 2D FIR filters publication-title: International Journal of Applied Engineering Research – ident: CR34 – start-page: 433 year: 2018 end-page: 440 ident: CR2 article-title: A 2x2 block processing architecture for a two-dimensional fir filter using scalable recursive convolution publication-title: Artificial Intelligence and Evolutionary Computations in Engineering Systems: proceedings of ICAIECES 2017 doi: 10.1007/978-981-10-7868-2_42 – volume: 37 start-page: 2934 year: 2018 end-page: 2957 ident: CR10 article-title: ASIC implementation of area-efficient, high-throughput 2-D IIR filter using distributed arithmetic publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-017-0698-z – ident: CR5 – volume: 3 start-page: 22127 issue: 3 year: 2012 ident: CR17 article-title: Design of sharp 2D multiplier-less circularly symmetric FIR filter using harmony search algorithm and frequency transformation publication-title: Journal of Signal and Information Processing doi: 10.4236/jsip.2012.33044 – volume: 31 start-page: 1385 year: 2020 end-page: 1410 ident: CR27 article-title: Design and implementation of low complexity circularly symmetric 2D FIR filter architectures publication-title: Multidimensional Systems and Signal Processing doi: 10.1007/s11045-020-00714-3 – volume: 42 start-page: 780 issue: 2 year: 2023 end-page: 800 ident: CR13 article-title: Area-power-and delay-optimized 2D FIR filter architecture for image processing applications publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-022-02232-y – volume: 26 start-page: 660 issue: 1 year: 2013 end-page: 668 ident: CR18 article-title: Design of frequency response masking FIR filter in the canonic signed digit space using modified artificial bee colony algorithm publication-title: Engineering Applications of Artificial Intelligence doi: 10.1016/j.engappai.2012.02.010 – volume: 40 start-page: 1458 year: 2021 end-page: 1478 ident: CR32 article-title: Efficient architecture for the realization of 2-D adaptive FIR filter using distributed arithmetic publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-020-01539-y – volume: 23 start-page: 405 issue: 7 year: 1976 end-page: 414 ident: CR20 article-title: McClellan transformations for two-dimensional digital filtering: I-design publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/TCS.1976.1084236 – ident: CR24 – volume: 18 start-page: 583 issue: 3 year: 2022 end-page: 602 ident: CR29 article-title: Implementation of low power generic 2D FIR filter bank architecture using memory-based multipliers publication-title: Journal of Mobile Multimedia – volume: 41 start-page: 1550 year: 2022 end-page: 1562 ident: CR14 article-title: A low computational complexity scheme for designing linear phase sparse FIR filters publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-021-01836-0 – volume: 58 start-page: 746 issue: 4 year: 2010 end-page: 754 ident: CR16 article-title: Design of 2-D wideband circularly symmetric FIR filters by multiplierless high-order transformation publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2010.2078730 – volume: 40 start-page: 1458 year: 2021 ident: 895_CR32 publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-020-01539-y – volume: 23 start-page: 405 issue: 7 year: 1976 ident: 895_CR20 publication-title: IEEE Transactions on Circuits and Systems doi: 10.1109/TCS.1976.1084236 – volume: 12 start-page: 3684 issue: 4 year: 2022 ident: 895_CR33 publication-title: International Journal of Electrical and Computer Engineering – volume: 61 start-page: 120 issue: 1 year: 2014 ident: 895_CR23 publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2013.2265953 – volume: 4 start-page: 69 issue: 1 year: 2017 ident: 895_CR1 publication-title: IEEE Transactions on Multi-Scale Computing Systems doi: 10.1109/TMSCS.2017.2695588 – volume: 3 start-page: 22127 issue: 3 year: 2012 ident: 895_CR17 publication-title: Journal of Signal and Information Processing doi: 10.4236/jsip.2012.33044 – ident: 895_CR5 doi: 10.1109/TENCON.2016.7848561 – volume: 42 start-page: 780 issue: 2 year: 2023 ident: 895_CR13 publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-022-02232-y – ident: 895_CR34 doi: 10.1109/TENCON.2019.8929423 – volume: 118 start-page: 109301 year: 2024 ident: 895_CR30 publication-title: Computers and Electrical Engineering doi: 10.1016/j.compeleceng.2024.109301 – volume: 10 start-page: 76693 year: 2022 ident: 895_CR9 publication-title: IEEE Access doi: 10.1109/ACCESS.2022.3192619 – ident: 895_CR24 doi: 10.1109/TENCON.2008.4766758 – start-page: 540 volume-title: Advances in intelligent, interactive systems and applications. IISA 2018. Advances in intelligent systems and computing year: 2019 ident: 895_CR39 – volume: 65 start-page: 2057 issue: 12 year: 2018 ident: 895_CR4 publication-title: IEEE Transactions on Circuits and Systems II: Express Briefs – volume: 68 start-page: 2522 issue: 6 year: 2021 ident: 895_CR38 publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2021.3061766 – volume: 38 start-page: 1099 year: 2019 ident: 895_CR11 publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-018-0897-2 – volume: 84 start-page: 12 year: 2022 ident: 895_CR28 publication-title: Integration doi: 10.1016/j.vlsi.2022.01.004 – volume: 18 start-page: 583 issue: 3 year: 2022 ident: 895_CR29 publication-title: Journal of Mobile Multimedia – ident: 895_CR25 doi: 10.1109/IDT.2013.6727130 – volume: 30 start-page: 89 issue: 1 year: 2022 ident: 895_CR6 publication-title: Computer Assisted Methods in Engineering and Science – volume: 31 start-page: 1385 year: 2020 ident: 895_CR27 publication-title: Multidimensional Systems and Signal Processing doi: 10.1007/s11045-020-00714-3 – year: 2024 ident: 895_CR15 publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.4102 – volume: 49 start-page: 3653 issue: 11 year: 2021 ident: 895_CR26 publication-title: International Journal of Circuit Theory and Applications doi: 10.1002/cta.3114 – volume: 58 start-page: 746 issue: 4 year: 2010 ident: 895_CR16 publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2010.2078730 – volume: 133 year: 2023 ident: 895_CR35 publication-title: Digital Signal Processing doi: 10.1016/j.dsp.2022.103842 – volume: 10 start-page: 16101 issue: 20 year: 2015 ident: 895_CR36 publication-title: International Journal of Applied Engineering Research – volume-title: Design of optimal multiplierless FRM-based wideband channelizer With STB year: 2024 ident: 895_CR40 doi: 10.1109/TCSII.2024.3352506 – volume: 37 start-page: 2934 year: 2018 ident: 895_CR10 publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-017-0698-z – ident: 895_CR19 – volume: 146 start-page: 91 issue: 2 year: 2019 ident: 895_CR22 publication-title: IEE Proceedings-Computers and Digital Techniques doi: 10.1049/ip-cdt:19990201 – volume: 14 start-page: 56 issue: 02 year: 2023 ident: 895_CR37 publication-title: Journal of Engineering Sciences – volume: 41 start-page: 1550 year: 2022 ident: 895_CR14 publication-title: Circuits, Systems, and Signal Processing doi: 10.1007/s00034-021-01836-0 – volume: 26 start-page: 660 issue: 1 year: 2013 ident: 895_CR18 publication-title: Engineering Applications of Artificial Intelligence doi: 10.1016/j.engappai.2012.02.010 – start-page: 861 volume-title: Advances in VLSI communication and signal processing select proceedings of VCAS 2018 year: 2020 ident: 895_CR12 doi: 10.1007/978-981-32-9775-3_78 – volume: 66 start-page: 2298 issue: 6 year: 2019 ident: 895_CR3 publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2018.2889260 – volume: 12 start-page: 1182 year: 2023 ident: 895_CR7 publication-title: F1000Research doi: 10.12688/f1000research.126067.1 – volume: 69 start-page: 2885 issue: 7 year: 2022 ident: 895_CR21 publication-title: IEEE Transactions on Circuits and Systems I: Regular Papers doi: 10.1109/TCSI.2022.3165469 – volume: 2018 start-page: 787 year: 2020 ident: 895_CR31 publication-title: Advances in VLSI, Communication, and Signal Processing: Select Proceedings of VCAS doi: 10.1007/978-981-32-9775-3_71 – volume: 108 start-page: 323 issue: 2 year: 2022 ident: 895_CR8 publication-title: Analog Integrated Circuits and Signal Processing doi: 10.1007/s10470-021-01853-8 – start-page: 433 volume-title: Artificial Intelligence and Evolutionary Computations in Engineering Systems: proceedings of ICAIECES 2017 year: 2018 ident: 895_CR2 doi: 10.1007/978-981-10-7868-2_42 |
| SSID | ssj0010016 |
| Score | 2.3783998 |
| Snippet | In this paper, an optimized and high-performance Two Dimensional-Finite Impulse Response (2D-FIR) filter is designed and hardware architecture is implemented... |
| SourceID | proquest crossref springer |
| SourceType | Aggregation Database Index Database Publisher |
| SubjectTerms | Artificial Intelligence Circuits and Systems Delay Design Electrical Engineering Engineering FIR filters Image filters Image processing Impulse response Real time Signal,Image and Speech Processing |
| Title | Design and implementation of optimized 2D FIR symmetric filter architecture using modified McClellan transformation and CSD-CSE |
| URI | https://link.springer.com/article/10.1007/s11045-024-00895-1 https://www.proquest.com/docview/3115480333 |
| Volume | 36 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwELVQu8CA-BSFUnlgA0upHSfu2KYtBUQHSqUyRbFjo0okQTQMsPDX8aUJLQgGpgyJL9Kd7Xune3eH0FnEOzLmbUM0913iUhmTjuKC-IAt2sZARzxgW4y90dS9nvFZWRS2qNjuVUqyuKlXxW42coBqYpdYv9XhxMY8dQ6xu93FU9r9yh0Aiik67FFGPOvhylKZ32V8d0crjPkjLVp4m-EO2i5hIu4u7bqLNnS6h7bWmgfuo49-Qb7AURrjeVLRwEHPODM4s1dBMn_XMaZ9PLy6w4u3JIHpWQqbOWTI8XoKAQP9_REnWTw3FpPiWxU8AS0qxfkasM2WPwsmfRJMBgdoOhzcByNSjlMgivpOTjomdk1b-IZFDtVc-kJabMCVVkZrqqJYyYhqh0WeMRxggWJaeoC47DqhHHaIammW6iOEldBUCy49u8KVgkVUyth3rUwb__iSNtB5pdXwedk1I1z1RwYbhNYGYWGDsN1AzUrxYXmCFiF0AXKFwxhroIvKGKvXf0s7_t_nJ2iTwkjfgqHSRLX85VWfWpyRyxaqd4e93hielw83g1axzT4BWITNgw |
| linkProvider | Springer Nature |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwELVQGYAB8SkKBTywgaXEjhNnrNJWBdoOtJW6RbFjo0gkQTQMsPDXsdOEFAQDc-KL5HN873Tv3gFwFVGfx9RWSFLPQQ7mMfIFZcgz2MJWyijiGbbFxB3OnbsFXVRNYcua7V6XJMubuml205mD6SZ2kI5bPkU659nUYIAZItccd79qBwbFlAp7mCBXR7iqVeZ3G9_DUYMxf5RFy2gz2AO7FUyE3ZVf98GGzA7Azpp44CH46JXkCxhlMUzSmgZu9hnmCub6KkiTdxlD3IOD2we4fEtTMz1LQJWYCjlcLyFAQ39_hGkeJ0pjUjgWwZOhRWWwWAO2-epjwbSHgmn_CMwH_VkwRNU4BSSwZxXIV7GjbOYpEllYUu4xrrEBFVIoKbGIYsEjLC0SuUpRAwsEkdw1iEuvY8Iix6CV5Zk8AVAwiSWj3NUrHM5IhDmPPUfb1PmPx3EbXNe7Gj6vVDPCRh_Z-CDUPghLH4R2G3TqjQ-rP2gZGhUgh1mEkDa4qZ3RPP7b2un_Xr8EW8PZeBSObif3Z2Abm_G-JVulA1rFy6s815ij4BflEfsETCvNZg |
| linkToPdf | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LS8NAEF6kguhBfGK16h686dJkN5ukx9IHrY8i1kJvIfuSgkmKjQe9-NfdSRtbRQ-ek53AzmbnG-abbxC6iHlDKO4aonngEY8KRRqShyQAbOEaA4p4wLYY-L2Rdz3m45Uu_oLtXpYk5z0NoNKU5vWpMvVl45vNIqCz2CM2hjU4sfnPur2OXTjXI9r8qiMAoinU9igjvo12i7aZ3218D01LvPmjRFpEnu4O2l5ARtyc-3gXrel0D22tCAnuo492QcTAcarwJCkp4bDnODM4s9dCMnnXCtM27vYf8OwtSWCSlsRmAtVyvFpOwECFf8JJpibG4lN8J1vPQJFKcb4CcrP5x1rDNmkNOwdo1O08tnpkMVqBSBo4OWkY5Rk3DAyLHaq5CEJhcQKXWhqtqYyVFDHVDot9YzhABMm08AF92XWhdNghqqRZqo8QlqGmOuTCtys8EbKYCqECz9q0uVAgaBVdlrsaTecKGtFSKxl8EFkfRIUPIreKauXGR4u_aRaBIpAXOoyxKroqnbF8_Le14_-9fo427tvd6LY_uDlBmxQm_RbElRqq5C-v-tTCj1ycFSfsE0410aI |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Design+and+implementation+of+optimized+2D+FIR+symmetric+filter+architecture+using+modified+McClellan+transformation+and+CSD-CSE&rft.jtitle=Multidimensional+systems+and+signal+processing&rft.au=Odugu%2C+Venkata+Krishna&rft.au=Rao%2C+Bitra+Janardhana&rft.au=Bojjawar%2C+Satish&rft.au=Raju%2C+U.+Appala&rft.date=2025-12-01&rft.pub=Springer+US&rft.issn=0923-6082&rft.eissn=1573-0824&rft.volume=36&rft.issue=1&rft_id=info:doi/10.1007%2Fs11045-024-00895-1&rft.externalDocID=10_1007_s11045_024_00895_1 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0923-6082&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0923-6082&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0923-6082&client=summon |