ReNo: novel switch architecture for reliability improvement of NoCs

Using of nano-scale Very Large-Scale Integration technologies in Network-on-Chips (NoCs), switches and communication wires of NoCs are sensitive to transient faults. In the architecture of NoCs, switches play an important role in the correct and reliable functions of NoCs against transient faults. T...

Full description

Saved in:
Bibliographic Details
Published inThe Journal of supercomputing Vol. 79; no. 3; pp. 2801 - 2818
Main Authors Shirmohammadi, Zahra, Allivand, Yassin, Mozafari, Fereshte, Patooghy, Ahmad, Jalal, Mona, Abharian, Sanaz Kazemi
Format Journal Article
LanguageEnglish
Published New York Springer US 01.02.2023
Springer Nature B.V
Subjects
Compilers
Computer Science
Configurations
Controllers
Crosstalk
Faults
Interpreters
Large scale integration
Processor Architectures
Programming Languages
Reliability
Single event upsets
Switches
Very large scale integration
Fault
Switch
Network-on-Chip
Reconfiguration
Online AccessGet full text

Cover

More Information
Summary:Using of nano-scale Very Large-Scale Integration technologies in Network-on-Chips (NoCs), switches and communication wires of NoCs are sensitive to transient faults. In the architecture of NoCs, switches play an important role in the correct and reliable functions of NoCs against transient faults. The most important transient faults in NoCs  are crosstalk faults in wires and Single Event Upset (SEU) and Multipl Event Upset (MBU) faults in buffers. In order to provide reliable switch, we propose a new reconfigurable switch architecture named ReNo to make NoCs more resilience to transient faults. ReNo is able to work in four configurations with several levels of reliability. As a result, local configuration controller logic is used to preserve against transient faults. In ReNo architecture, when a controller finds a high error rate, it configures the switch to a high reliability mode. In this way, imposed performance and power overheads to the switch are minimized. Simulation results which are obtained by Orion patch for power estimation show a significant reliability improvement with a meager performance and power saving at least 20% is achieved in proposed switch architecture, with improvement to state-of-the-art mechanisms.
ISSN:0920-8542
1573-0484
DOI:10.1007/s11227-022-04732-9