A numerical model for MOSFET's from liquid-nitrogen temperature to room temperature

• Published in: IEEE transactions on electron devices Vol. 42; no. 1; pp. 123 - 134
• Main Authors: Ghazavi, P., Fat Duen Ho
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.01.1995; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Boltzmann distribution; Current density; Distribution functions; Electronics; Exact sciences and technology; Impurities; Kelvin; MOSFETs; Numerical models; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Statistical distributions; Temperature distribution; Transistors; Field effect transistor; Semiconductor device; Voltage current curve; Electrical properties; Silicon; MOS transistor; Modeling
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.370026

A two-dimensional Gummel model is developed to simulate the electrical behavior of silicon MOSFET's in the temperature range of 77 to 300 degrees Kelvin. In this paper, first a short description of the simulator is presented. Then, we study differences between the results when Fermi-Dirac distribution is used and when Boltzmann distribution is used for mobile carriers in calculating the ionized dopant concentrations and the current densities for moderately doped n- and p-channel enhancement-mode MOSFETs. We also investigate the differences between the results when the two different distribution functions are used for mobile carriers in calculating the ionized impurities at high channel concentration and the current densities for moderately doped n-channel depletion-mode MOSFET's. There are no differences for drain currents using these two different statistics. Moreover, using Boltzmann statistics, reduces the computational effort by 40 to 50 percent in this model. In addition, we evaluate the boundary conditions using these two different distribution functions. The differences between the obtained currents in linear and saturation regions for an n-channel enhancement mode MOSFET is less than 8 percent. Some I-V results attained from the simulation of buried-channel NMOS transistors are presented and compared with the experimental data in the literature. The model is also checked for comparison with some experimental data reported in the literature for a PMOS, an NMOS, and a CMOS inverter specially designed for low temperature operation. In addition, the I-V characteristics obtained by our calculations are compared with those of Selberherr's to check for the validity and accuracy of the simulator. Reasonable agreement between the simulated and experimental data is obtained.< >