Synchronization Validation for Cross-Thread Dependences in Parallel Programs

• Published in: International journal of parallel programming Vol. 45; no. 6; pp. 1326 - 1365
• Main Authors: Dutta, Sudakshina, Sarkar, Dipankar, Rawat, Arvind
• Format: Journal Article
• Language: English
• Published: New York Springer US 01.12.2017; Springer Nature B.V
• Subjects: Algorithms; Arrays; Compilers; Computer Science; Dependence; Insertion; Music teachers; Parallel processing; Parallel programming; Processor Architectures; Sequential scheduling; Software Engineering/Programming and Operating Systems; Studies; Synchronism; Synthesis; Theory of Computation; Transformations; Access; Conflict access graph; Conflict access instance; Conflict edge; Dependence graph; Conflict access
• ISSN: 0885-7458; 1573-7640
• DOI: 10.1007/s10766-016-0467-9

Parallelizing transformations are applied in the process of high-level synthesis to enable the designer to optimize and improve the synthesis results. Parallelizing compilers often apply parallelizing transformations to convert a sequential program into a concurrentized or vectorized program so that the resulting parallel program can exploit the architectures of parallel machines. Concurrentization of loops in a sequential program is one of the most important transformations performed by these compilers. Loop concurrentization often requires insertion of w a i t – s i g n a l synchronization instructions within the body of the concurrentized loops to achieve synchronization among the threads for preserving the dependences of the original sequential program. In the current work, we have proposed a method of analyzing the synchronization instructions for constructing the dependence graph of a loop concurrentized program. The resulting dependence graph, devoid of the synchronization instructions, is then checked for equivalence with the dependence graph of the original sequential program using methods reported in the literature. The proposed algorithm signals errors if the parallel program deadlocks or becomes non-determinate due to faulty insertion of w a i t – s i g n a l instructions.