Realization of resistively matched three-ports and the suppression of multiple reflections traveling on branched transmission lines
In the mutual interconnects between the printed transmission lines containing highspeed logic devices, impedance mismatch causes multiple reflections of the pulse waveform so that false triggerings of logic device occur. This paper describes suppression of multiple reflections on a three‐port single...
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| Published in | Electronics & communications in Japan. Part 3, Fundamental electronic science Vol. 74; no. 6; pp. 75 - 84 |
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| Main Author | |
| Format | Journal Article |
| Language | English |
| Published |
New York
Wiley Subscription Services, Inc., A Wiley Company
1991
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| Online Access | Get full text |
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| Summary: | In the mutual interconnects between the printed transmission lines containing highspeed logic devices, impedance mismatch causes multiple reflections of the pulse waveform so that false triggerings of logic device occur. This paper describes suppression of multiple reflections on a three‐port single‐branched transmission line which divides a signal into two directions.
First, a resistively matched three‐port is proposed in which all the ports are matched to arbitrary loads. Its realization by the scattering matrix is shown. If negative branching resistors are included, this circuit can always be realized, although a negative resistor is not easily conceived. Hence, the range of the load resistance is found which is realizable with a nonnegative branching resistor. This range is shown graphically.
Next, three transmission lines with arbitrary characteristic impedances are connected to the resistively matched three‐port. This is used as a three‐port, single‐branched transmission line. This circuit supports an ideal condition in which a signal is sent out to the output side without reduction of the amplitude level and without causing any multiple reflection for an incident voltage wave. However, this ideal condition has two cases: one requiring a negative branching resistor, and another requiring an infinite characteristic impedance. Neither can be realized easily. Hence, realizable element values closest to the ideal condition are selected for which the multiple reflection is studied. In comparison with the case without a resistive matched three‐port, the effectiveness of suppression of the multiple reflection is superior if the latter is used. |
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| Bibliography: | ArticleID:ECJC4430740608 ark:/67375/WNG-MWRMHHKD-N istex:64144B137FA7F2A560C0D51DC855EDEFB7810EFE Iwata Sakagami graduated in 1972 from Dept. of Electronic Engineering, Hokkaido University. After working at Mitsubishi Electric, he obtained a Dr. of Eng. degree from Hokkaido University in 1980. In that year, he became an Assistant of the Research Institute of Applied Electricity, Hokkaido University. In 1987 he became an Associate Professor in the Dept. of Information Engineering, Kushiro College and in 1988, an Associate Professor in the Dept. of Electronic Engineering, Muroran Institute of Technology. He has been engaged in research on distributed constant circuits and analog circuits. |
| ISSN: | 1042-0967 1520-6440 |
| DOI: | 10.1002/ecjc.4430740608 |