Low-Frequency Noise Characteristics in SONOS Flash Memory With Vertically Stacked Nanowire FETs

• Published in: IEEE electron device letters Vol. 38; no. 1; pp. 40 - 43
• Main Authors: Bang, Tewook, Lee, Byung-Hyun, Kim, Choong-Ki, Ahn, Dae-Chul, Jeon, Seung-Bae, Kang, Min-Ho, Oh, Jae-Sub, Choi, Yang-Kyu
• Format: Journal Article
• Language: English
• Published: IEEE 01.01.2017
• Subjects: Field effect transistors; Gallium arsenide; Gate-all-around (GAA); inversion-mode (IM); Ions; junctionless-mode (JM); Logic gates; low-frequency (LF) noise; Low-frequency noise; one-route all-dry etch; Silicon; SONOS; SONOS devices; vertically stacked nanowire (VS-NW)
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2016.2632182

Low-frequency (LF) noise in a vertically stacked nanowire (VS-NW) memory device, which is based on the silicon-oxide-nitride-oxide-silicon (SONOS) configuration is characterized in two different operational modes, an inversion-mode and a junctionless-mode (JM). The LF noise showed 1/f -shape behavior regardless of the operational mode and followed the carrier number fluctuation model. With regard to the device-to-device variation and quality degradation of the LF noise after iterative program/erase operations, the five-story JM SONOS memory showed comparatively high immunity arising from its inherent bulk conduction and no-junction feature. Despite the harsh fabrication condition used to construct five-story VS-NW, even the five-story JM SONOS memory exhibited LF noise characteristics comparable to those of one-story JM SONOS memory. Thus, the five-story JM SONOS memory is attractive due to its high-performance capabilities and good scalability.