A low-power CMOS smart temperature sensor for RFID application

This paper presents the design and implement ofa CMOS smart temperature sensor, which consists of a low power analog front-end and a 12-bit low-power successive approximation register （SAR） analog-to-digital converter （ADC）. The analog front-end generates a proportional-to-absolute-temperature （PTAT...

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Bibliographic Details
Published inJournal of semiconductors Vol. 35; no. 11; pp. 107 - 113
Main Author 谢良波 刘佳欣 王耀 文光俊
Format Journal Article
LanguageEnglish
Published 01.11.2014
Subjects
CMOS
CMOS技术
Digitization
Electric potential
Errors
Radio frequency identification
RFID
Semiconductors
Temperature sensors
Voltage
低功耗
基准电压
应用
智能温度传感器
模拟前端
模拟数字转换器
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ISSN1674-4926
DOI10.1088/1674-4926/35/11/115002

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Summary:This paper presents the design and implement ofa CMOS smart temperature sensor, which consists of a low power analog front-end and a 12-bit low-power successive approximation register （SAR） analog-to-digital converter （ADC）. The analog front-end generates a proportional-to-absolute-temperature （PTAT） voltage with MOS- FET circuits operating in the sub-threshold region. A reference voltage is also generated and optimized in order to minimize the temperature error and the 12-bit SAR ADC is used to digitize the PTAT voltage. Using 0.18 μm CMOS technology, measurement results show that the temperature error is -0.69/＋0.85 ℃ after one-point calibra- tion over a temperature range of-40 to 100 ℃. Under a conversion speed of 1K samples/s, the power consumption is only 2.02 μW while the chip area is 230 × 225 μm2, and it is suitable for RFID application.
Bibliography:Xie Liangbo, Liu Jiaxin, Wang Yao, Wen Guangjun（ Centre for RFIC and System Technology, School of Communication and Information Engineering, University of Electronic Science and Technology of China, Chengdu 611731, China）
This paper presents the design and implement ofa CMOS smart temperature sensor, which consists of a low power analog front-end and a 12-bit low-power successive approximation register （SAR） analog-to-digital converter （ADC）. The analog front-end generates a proportional-to-absolute-temperature （PTAT） voltage with MOS- FET circuits operating in the sub-threshold region. A reference voltage is also generated and optimized in order to minimize the temperature error and the 12-bit SAR ADC is used to digitize the PTAT voltage. Using 0.18 μm CMOS technology, measurement results show that the temperature error is -0.69/＋0.85 ℃ after one-point calibra- tion over a temperature range of-40 to 100 ℃. Under a conversion speed of 1K samples/s, the power consumption is only 2.02 μW while the chip area is 230 × 225 μm2, and it is suitable for RFID application.
11-5781/TN
CMOS; low power; temperature sensor; sub-threshold; SAR ADC
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ISSN:1674-4926
DOI:10.1088/1674-4926/35/11/115002