A low power 11-bit 100 MS/s SAR ADC IP

• Published in: Journal of semiconductors Vol. 36; no. 2; pp. 130 - 134
• Main Author: 王亚 薛春莹 李福乐 张春 王志华
• Format: Journal Article
• Language: English
• Published: 01.02.2015
• Subjects: ADC; Channels; CMOS技术; Comparators; Consumption; High speed; Linearity; Logic; Oscillators; SAR; Semiconductors; 低功耗; 动态比较器; 双通道; 环形振荡器

This paper presents a dual-channel 11-bit 100 MS/s hybrid SAR ADC IR Each channel adopts flash- SAR architecture for high speed, low power and high linearity. Dynamic comparators in the coarse flash ADC and the fine SAR ADC further contribute to the reduction of power consumption. A gate-controlled...