High-performance, low-area-overhead, and low-delay triple-node-upset self-recoverable latch design based on stacked transistors

• Published in: Microelectronics and reliability Vol. 172; p. 115830
• Main Authors: Xu, Hui, Dai, Yue, Ma, Ruijun, Liang, Huaguo, Huang, Zhengfeng, Ni, Tianming, Zhang, Chuanjian, Chen, Xin, Tang, Ye
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.09.2025
• Subjects: Latch; Self-recovery; Stacked transistors; Triple-node-upset; Latch; Self-recovery; Stacked transistors; Triple-node-upset
• ISSN: 0026-2714
• DOI: 10.1016/j.microrel.2025.115830

Due to the gradual reduction in the feature size of transistors in integrated circuits (ICs), triple-node-upsets (TNUs) caused by the striking of energetic particles in harsh radiation environments have become a considerable reliability concern for ICs. To overcome the limitations of current radiation-hardened designs regarding overhead and reliability, this paper proposes a high-performance, low-area-overhead, and low-delay TNU self-recoverable latch (HLLT) based on N-type stacked transistors for aerospace applications. The proposed HLLT latch comprises three symmetrical modules that protect each other. In addition, high-speed path and clock gating technology are employed to reduce delay overhead and power consumption, respectively. Simulation results show that, compared to five existing TNU-recoverable latches, the proposed HLLT latch achieves average reductions of 29.97 %, 57.12 %, 36.52 %, and 83.00 % in area overhead, power consumption, delay, and area-power-delay-product (APDP), respectively. Furthermore, the proposed HLLT latch has lower sensitivity and better stability to variations in PVT (Process, Voltage, Temperature). •This paper proposes a triple-node upset self-recoverable latch based on N-type stacked transistors.•The new latch comprises three symmetrical modules that protect each other.•There is a low area-overhead and low delay compared to existing same-type structures.•Insensitivity to variations in voltage, temperature, and threshold voltage.