A digital background calibration algorithm of a pipeline ADC based on output code calculation
This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter(ADC).The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic.Based on the analy...
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Published in | Journal of semiconductors Vol. 33; no. 11; pp. 110 - 114 |
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Main Author | |
Format | Journal Article |
Language | English |
Published |
01.11.2012
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Subjects | |
Online Access | Get full text |
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