A digital background calibration algorithm of a pipeline ADC based on output code calculation

This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter（ADC）.The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic.Based on the analy...

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Published inJournal of semiconductors Vol. 33; no. 11; pp. 110 - 114
Main Author 邵健健 李玮韬 孙操 李福乐 张春 王志华
Format Journal Article
LanguageEnglish
Published 01.11.2012
Subjects
ADC
Algorithms
Calibration
Digital
Errors
Linearity
Logic
Noise levels
Semiconductors
代码
基础
校准
流水线
算法
计算
输出
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Abstract This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter（ADC）.The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic.Based on the analysis of the output codes,the calibration logic estimates the bit weight of each stage and corrects the outputs.An experimental 14-bit pipelined ADC is fabricated to verify the algorithm.The results show that INL errors drop from 20 LSB to 1.7 LSB,DNL errors drop from 2 LSB to 0.4 LSB,SNDR grows from 57 to 65.7 dB and THD drops from -58 to -81 dB.The linearity of the pipelined ADC is improved significantly.
AbstractList This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter（ADC）.The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic.Based on the analysis of the output codes,the calibration logic estimates the bit weight of each stage and corrects the outputs.An experimental 14-bit pipelined ADC is fabricated to verify the algorithm.The results show that INL errors drop from 20 LSB to 1.7 LSB,DNL errors drop from 2 LSB to 0.4 LSB,SNDR grows from 57 to 65.7 dB and THD drops from -58 to -81 dB.The linearity of the pipelined ADC is improved significantly.
This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter (ADC). The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic. Based on the analysis of the output codes, the calibration logic estimates the bit weight of each stage and corrects the outputs. An experimental 14-bit pipelined ADC is fabricated to verify the algorithm. The results show that INL errors drop from 20 LSB to 1.7 LSB, DNL errors drop from 2 LSB to 0.4 LSB, SNDR grows from 57 to 65.7 dB and THD drops from -58 to -81 dB. The linearity of the pipelined ADC is improved significantly.
Author 邵健健 李玮韬 孙操 李福乐 张春 王志华
AuthorAffiliation Institute of Microelectronics,Tsinghua University
Author_xml – sequence: 1
  fullname: 邵健健 李玮韬 孙操 李福乐 张春 王志华
BookMark eNo9kD1vwyAURRlSqWmav1DRrUsaHmAbj1H6KUXq0o4Vwhg7qAQcsIf--9pNFOlJd3j33OHcoJkP3iB0B-QRiBBryAu-4iXN14ytAcbLCJAZml8e12iZkq0IKYVgnJA5-t7g2ra2Vw5XSv-0MQy-xlo5W0XV2-Cxcm2Itt8fcGiwwp3tjLPe4M3TdkSSqfFYCkPfDT3WoTYTrAf3D9-iq0a5ZJbnXKCvl-fP7dtq9_H6vt3sVprm0K8YHZNppUuRMV1SanSTacq4KbOqVJoQXUOTE0M041QIgJo1FS0K1oiaFIot0MNpt4vhOJjUy4NN2jinvAlDksBZWWQi5zBW81NVx5BSNI3soj2o-CuByEmjnGzJyZZkTALIk8YRvD-D--Dbo_XtheScQE5Fwf4AZ0Z0gQ
Cites_doi 10.1109/TCSI.2007.895231
10.1109/ISCAS.2005.1465714
10.1109/82.826750
10.1109/4.545806
10.1109/JSSC.2007.914260
10.1109/JSSC.2005.856291
10.1109/4.75065
10.1109/82.554434
ContentType Journal Article
DBID 2RA
92L
CQIGP
W92
~WA
AAYXX
CITATION
7SP
7U5
8FD
L7M
DOI 10.1088/1674-4926/33/11/115010
DatabaseName 维普期刊资源整合服务平台
中文科技期刊数据库-CALIS站点
中文科技期刊数据库-7.0平台
中文科技期刊数据库-工程技术
中文科技期刊数据库- 镜像站点
CrossRef
Electronics & Communications Abstracts
Solid State and Superconductivity Abstracts
Technology Research Database
Advanced Technologies Database with Aerospace
DatabaseTitle CrossRef
Solid State and Superconductivity Abstracts
Technology Research Database
Advanced Technologies Database with Aerospace
Electronics & Communications Abstracts
DatabaseTitleList
Solid State and Superconductivity Abstracts
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
Physics
DocumentTitleAlternate A digital background calibration algorithm of a pipeline ADC based on output code calculation
EndPage 114
ExternalDocumentID 10_1088_1674_4926_33_11_115010
44016287
GroupedDBID 02O
042
1WK
2B.
2C0
2RA
4.4
5B3
5VR
5VS
7.M
92H
92I
92L
92R
93N
AAGCD
AAJIO
AALHV
AATNI
ABHWH
ACAFW
ACGFO
ACGFS
ACHIP
AEFHF
AFUIB
AFYNE
AHSEE
AKPSB
ALMA_UNASSIGNED_HOLDINGS
ASPBG
AVWKF
AZFZN
BBWZM
CCEZO
CEBXE
CHBEP
CJUJL
CQIGP
CRLBU
CUBFJ
CW9
EBS
EDWGO
EJD
EQZZN
FA0
IJHAN
IOP
IZVLO
JCGBZ
KNG
KOT
M45
N5L
NS0
NT-
NT.
PJBAE
Q02
RIN
RNS
ROL
RPA
RW3
SY9
TCJ
TGT
W28
W92
~WA
-SI
-S~
5XA
5XJ
AAYXX
ACARI
AERVB
AGQPQ
AOAED
ARNYC
CAJEI
CITATION
Q--
TGMPQ
U1G
U5S
7SP
7U5
8FD
L7M
ID FETCH-LOGICAL-c261t-32c263cac9853c922ecf5c234e95b9ac00cd1f60e0c3428811d3fb2773f8d07a3
ISSN 1674-4926
IngestDate Fri Jul 11 03:54:11 EDT 2025
Tue Jul 01 03:20:27 EDT 2025
Wed Feb 14 10:39:44 EST 2024
IsPeerReviewed true
IsScholarly true
Issue 11
Language English
LinkModel OpenURL
MergedId FETCHMERGED-LOGICAL-c261t-32c263cac9853c922ecf5c234e95b9ac00cd1f60e0c3428811d3fb2773f8d07a3
Notes 11-5781/TN
pipeline ADC output code calculation background calibration
This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter（ADC）.The algorithm does not modify the analog circuit of pipelined stages and calibrates the raw conversion output by using a backend digital logic.Based on the analysis of the output codes,the calibration logic estimates the bit weight of each stage and corrects the outputs.An experimental 14-bit pipelined ADC is fabricated to verify the algorithm.The results show that INL errors drop from 20 LSB to 1.7 LSB,DNL errors drop from 2 LSB to 0.4 LSB,SNDR grows from 57 to 65.7 dB and THD drops from -58 to -81 dB.The linearity of the pipelined ADC is improved significantly.
ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
PQID 1439758641
PQPubID 23500
PageCount 5
ParticipantIDs proquest_miscellaneous_1439758641
crossref_primary_10_1088_1674_4926_33_11_115010
chongqing_primary_44016287
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2012-11-01
PublicationDateYYYYMMDD 2012-11-01
PublicationDate_xml – month: 11
  year: 2012
  text: 2012-11-01
  day: 01
PublicationDecade 2010
PublicationTitle Journal of semiconductors
PublicationTitleAlternate Chinese Journal of Semiconductors
PublicationYear 2012
References 1
Keane J P (5) 2005; 52
2
3
4
6
7
8
9
References_xml – ident: 8
  doi: 10.1109/TCSI.2007.895231
– ident: 9
  doi: 10.1109/ISCAS.2005.1465714
– ident: 4
  doi: 10.1109/82.826750
– ident: 2
  doi: 10.1109/4.545806
– ident: 6
  doi: 10.1109/JSSC.2007.914260
– volume: 52
  start-page: 32
  issn: 0018-9200
  year: 2005
  ident: 5
  publication-title: IEEE J. Solid-State Circuits
– ident: 7
  doi: 10.1109/JSSC.2005.856291
– ident: 1
  doi: 10.1109/4.75065
– ident: 3
  doi: 10.1109/82.554434
SSID ssib009883400
ssib051367712
ssib004869572
ssj0067441
ssib016971655
ssib022315920
ssib004377404
ssib017478542
Score 1.8589994
Snippet This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter（ADC）.The algorithm does...
This paper proposes a digital background calibration algorithm to correct linearity errors in a pipelined analog-to-digital converter (ADC). The algorithm does...
SourceID proquest
crossref
chongqing
SourceType Aggregation Database
Index Database
Publisher
StartPage 110
SubjectTerms ADC
Algorithms
Calibration
Digital
Errors
Linearity
Logic
Noise levels
Semiconductors
代码
基础
校准
流水线
算法
计算
输出
Title A digital background calibration algorithm of a pipeline ADC based on output code calculation
URI http://lib.cqvip.com/qk/94689X/201211/44016287.html
https://www.proquest.com/docview/1439758641
Volume 33
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwnV3di9NAEF_0RNAH0VO53qms4FuJzWazafJYziun1DvBFvoiYTNJ2qIm1aYv99c7s5uvwgmnL2nYpBPY-TE7v935YOydBKUSL1SOl2ZjB61k4ug8dZ1xHigv1W4mTbmmz1fB5cL_tFTLrn-nyS6pkvdwc2teyf9oFcdQr5Ql-w-abYXiAN6jfvGKGsbrnXQ8GaabFXX9GCYavlOCBiWpaUOBbQfwH6sS2f_6p02D3G62mXErJx_Oh7R-pXRWUO6r7b4aUnI7_Rnqhl5_cVt3FE1fFlQmtuxOgr6udXlwyDTbtNF79sypONiStY-n_T0H4dXJd52ZDMa-Q6UG-3bUFrRo8CJ6VpG8zjp41a6xwlG3mm80ebST0EjHe9pvnhqj3hfSr5p9dR1PF7NZPL9Yzu-zBx7SBepk8fH6S7MiozjTwbSV22SKI_lvx0ZSjoQY2a9QoY11Wax-oftw6LAcrtfGCZk_ZU9qNfCJhcIzdi8rjtnjXk3JY_bQxPTC7jn7NuE1PHgHD96DB2_hwcuca97AgyM8uIEHx5csPDjBg_fg8YItphfz80un7qbhALLkypEe_krQEKGHBpHnZZAr8KSfRSqJNLgupCIP3MwFiZw0FCKVeYLTKfMwdcdavmRHRVlkJ4wjbdCQp-iJAvgBUlSgGGVwkyARoPJowE7b6Yu3tmpK7COTD5CfD9iomc_2mYmECMOYtBGTNmIpkZvGVhsD9raZ9hiNH51o6SIr9zvkrehOqzDwxekd3jljjzowv2JH1e999hpdyip5Y_DyB_bhcL8
linkProvider IOP Publishing
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=A+digital+background+calibration+algorithm+of+a+pipeline+ADC+based+on+output+code+calculation&rft.jtitle=Journal+of+semiconductors&rft.au=Shao%2C+J&rft.au=Li%2C+W&rft.au=Sun%2C+C&rft.au=Li%2C+F&rft.date=2012-11-01&rft.issn=1674-4926&rft.volume=33&rft.issue=11&rft.spage=115010&rft.epage=1-5&rft_id=info:doi/10.1088%2F1674-4926%2F33%2F11%2F115010&rft.externalDBID=NO_FULL_TEXT
thumbnail_s http://utb.summon.serialssolutions.com/2.0.0/image/custom?url=http%3A%2F%2Fimage.cqvip.com%2Fvip1000%2Fqk%2F94689X%2F94689X.jpg