A 16-bit sigma-delta modulator applied in micro-machined inertial sensors

A fourth-order low-distortion low-pass sigma-delta （∑△） modulator is presented for micro-machined inertial sensors. The proposed single-loop single-bit feedback modulator is optimized with a feed-forward path to decrease the nonlinearities and power consumption. The IC is implemented in a standard 0...

Full description

Saved in:
Bibliographic Details
Published inJournal of semiconductors Vol. 35; no. 4; pp. 128 - 133
Main Author 徐宏林 付强 刘鸿娜 尹亮 王鹏飞 刘晓为
Format Journal Article
LanguageEnglish
Published 01.04.2014
Subjects
CMOS
CMOS技术
Inertial
Modulators
Noise levels
Power consumption
Sampling
Semiconductors
Sensors
Σ-Δ调制器
功率消耗
应用
微机械
惯性传感器
输入信号
采样频率
Online AccessGet full text

Cover

More Information
Summary:A fourth-order low-distortion low-pass sigma-delta （∑△） modulator is presented for micro-machined inertial sensors. The proposed single-loop single-bit feedback modulator is optimized with a feed-forward path to decrease the nonlinearities and power consumption. The IC is implemented in a standard 0.6 μm CMOS technology and operates at a sampling frequency of 3.846 MHz. The chip area is 2.12 mm^2 with 23 pads. The experimental results indicate a signal-to-noise ratio （SNR） of 100 dB and dynamic range （DR） of 103 dB at an oversampling rate （OSR） of 128 with the input signal amplitude of-3.88 dBFS at 9.8 kHz; the power consumption is 15 raW at a 5 V supply.
Bibliography:Xu Honglin, Fu Qiang, t, Liu Hongna, Yin Liang, Wang Pengfei, and Liu Xiaowei（ 1MEMS Center, Harbin Institute of Technology, Harbin 150001, China 2Key Laboratory of Micro-Systems and Micro-Structures Manufacturing, Harbin 15001, China）
11-5781/TN
analog-to-digital converter; low-distortion low-pass sigma delta modulator; micro-machined inertialsensor
A fourth-order low-distortion low-pass sigma-delta （∑△） modulator is presented for micro-machined inertial sensors. The proposed single-loop single-bit feedback modulator is optimized with a feed-forward path to decrease the nonlinearities and power consumption. The IC is implemented in a standard 0.6 μm CMOS technology and operates at a sampling frequency of 3.846 MHz. The chip area is 2.12 mm^2 with 23 pads. The experimental results indicate a signal-to-noise ratio （SNR） of 100 dB and dynamic range （DR） of 103 dB at an oversampling rate （OSR） of 128 with the input signal amplitude of-3.88 dBFS at 9.8 kHz; the power consumption is 15 raW at a 5 V supply.
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1674-4926
DOI:10.1088/1674-4926/35/4/045007