PVMC: Programmable Vector Memory Controller

In this work, we propose a Programmable Vector Memory Controller (PVMC), which boosts noncontiguous vector data accesses by integrating descriptors of memory patterns, a specialized local memory, a memory manager in hardware, and multiple DRAM controllers. We implemented and validated the proposed s...

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Bibliographic Details
Published in2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors pp. 240 - 247
Main Authors Hussain, Tassadaq, Palomar, Oscar, Unsal, Osman, Cristal, Adrian, Ayguade, Eduard, Valero, Mateo
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2014
Subjects
Bandwidth
Computer architecture
Data transfer
Registers
SDRAM
Vector processors
Vectors
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Summary:In this work, we propose a Programmable Vector Memory Controller (PVMC), which boosts noncontiguous vector data accesses by integrating descriptors of memory patterns, a specialized local memory, a memory manager in hardware, and multiple DRAM controllers. We implemented and validated the proposed system on an Altera DE4 FPGA board. We compare the performance of our proposal with a vector system without PVMC as well as a scalar only system. When compared with a baseline vector system, the results show that the PVMC system transfers data sets up to 2.2× to 14.9× faster, achieves between 2.16× to 3.18× of speedup for 5 applications and consumes 2.56 to 4.04 times less energy.
ISSN:1063-6862
DOI:10.1109/ASAP.2014.6868668