Laser Induced Forward Transfer of Interconnects for 3D Integration

• Published in: ECS transactions Vol. 41; no. 43; pp. 81 - 90
• Main Authors: Oosterhuis, Gerrit, Prenen, An, Huis in't Veld, A.J.
• Format: Journal Article
• Language: English
• Published: The Electrochemical Society, Inc 04.05.2012
• ISSN: 1938-5862; 1938-6737
• DOI: 10.1149/1.4717506

Interconnects are an important cost driver in advanced 3D chip packaging. This holds for Through Silicon Vias (TSV) for chip stacking, but also for other interconnect steps like re-distribution layers and solder bumps. Especially in applications with a low number (<100 mm-2) of relatively large features (10-100 µm diameter) with high aspect ratio (up to 1:10), conventional plating processes are slow and become cumbersome with increasing aspect ratio, thus becoming cost ineffective. Hence, industrially feasible, alternative direct-write processes are of interest for advanced interconnects. Laser Induced Forward Transfer (LIFT) is a direct write process with high potential to become a cost effective alternative for conventional patterned metallization schemes. Different process alternatives will be discussed and compared.