Extend Millisecond Anneal to Nickel Silicidation Process
As the transistor device is scaling down to 40nm, 32nm and beyond, Nickel silicide (NiSi) is used to create low resistance ohmic contacts between CMOS transistors and interconnects due to its low resistivity, line-width effect and low thermal budget request. Traditionally, Nickel silicides have been...
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Published in | ECS transactions Vol. 44; no. 1; pp. 631 - 635 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
The Electrochemical Society, Inc
16.03.2012
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Online Access | Get full text |
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Summary: | As the transistor device is scaling down to 40nm, 32nm and beyond, Nickel silicide (NiSi) is used to create low resistance ohmic contacts between CMOS transistors and interconnects due to its low resistivity, line-width effect and low thermal budget request. Traditionally, Nickel silicides have been formed typically by two steps lamp-based RTP anneals including a low temperature RTP-1 (220-300°C) and a high temperature RTP-2 (400-500°C). In this paper, AMAT Astra dynamic surface anneal (DSA), a scanning laser-based millisecond anneal system is used for RTP-2 step. The sheet resistance by 4-point probe, SEM, and TEM were used to characterize NiSi agglomeration and microstructures on blanket wafers. The results show that DSA millisecond salicidation anneal delays the onset of NiSi agglomeration, maintains a smooth surface and NiSi/Si interface. |
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ISSN: | 1938-5862 1938-6737 |
DOI: | 10.1149/1.3694379 |