A rapid technique for assessing the moisture ingress susceptibility of plastic-encapsulated integrated circuits

The equipment and associated methodology of a new technique for checking the susceptibility of plastic‐encapsulated ICs to moisture ingress is presented. The basis of the new technique is to immerse unbiased ICs in a salt solution and to subject them to high temperatures (in the range 120°C to 175°C...

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Published inQuality and reliability engineering international Vol. 3; no. 3; pp. 185 - 193
Main Authors Chwastek, E. J., Shaw, R. N.
Format Journal Article
LanguageEnglish
Published Chichester Wiley Subscription Services, Inc., A Wiley Company 01.07.1987
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Abstract The equipment and associated methodology of a new technique for checking the susceptibility of plastic‐encapsulated ICs to moisture ingress is presented. The basis of the new technique is to immerse unbiased ICs in a salt solution and to subject them to high temperatures (in the range 120°C to 175°C) and to high pressures (2 to 9 atmospheres). At the highest temperature, results can be obtained within a few hours, although a 20 h test at 165°C is suggested as a screen for components. The test is extremely simple to carry out and a testing facility can be quickly established. Using CMOS components from five different vendors, good agreement has been obtained between the results from the new test and the results from a biased 85°C/85 percent RH test.
AbstractList The equipment and associated methodology of a new technique for checking the susceptibility of plastic‐encapsulated ICs to moisture ingress is presented. The basis of the new technique is to immerse unbiased ICs in a salt solution and to subject them to high temperatures (in the range 120°C to 175°C) and to high pressures (2 to 9 atmospheres). At the highest temperature, results can be obtained within a few hours, although a 20 h test at 165°C is suggested as a screen for components. The test is extremely simple to carry out and a testing facility can be quickly established. Using CMOS components from five different vendors, good agreement has been obtained between the results from the new test and the results from a biased 85°C/85 percent RH test.
The equipment and associated methodology of a new technique for checking the susceptibility of plastic-encapsulated ICs to moisture ingress is presented. The basis of the new technique is to immerse unbiased ICs in a salt solution and to subject them to high temperatures (in the range 120 to 175 deg C) and to high pressures (2 to 9 atm). At the highest temperature, results can be obtained within a few hours, although a 20 h test at 165 deg C is suggested as a screen for components. The test is extremely simple to carry out and a testing facility can be quickly established. Using CMOS components from five different vendors, good agreement has been obtained between the results from the new test and the results from a biased 85 deg C/85 percent RH test. 23 ref.--AA
Author Shaw, R. N.
Chwastek, E. J.
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10.1149/1.2134003
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10.1007/978-94-009-4942-3
10.1109/IRPS.1979.362880
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Issue 3
Keywords Processing control
Encapsulation
Lifetime
Integrated circuit
Package
Plastics
Moisture test
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– reference: M. T. Goosey (ed.), Plastics for Electronics, Elsevier Applied Science, Amsterdam, 1985.
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Snippet The equipment and associated methodology of a new technique for checking the susceptibility of plastic‐encapsulated ICs to moisture ingress is presented. The...
The equipment and associated methodology of a new technique for checking the susceptibility of plastic-encapsulated ICs to moisture ingress is presented. The...
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SubjectTerms Applied sciences
Electronics
Exact sciences and technology
IC reliability
Microelectronic fabrication (materials and surfaces technology)
Plastic encapsulated integrated circuits
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Title A rapid technique for assessing the moisture ingress susceptibility of plastic-encapsulated integrated circuits
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